From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Subject: [PATCH 00/46] Parallel submission aka multi-bb execbuf Date: Tue, 3 Aug 2021 15:28:57 -0700 [thread overview] Message-ID: <20210803222943.27686-1-matthew.brost@intel.com> (raw) As discussed in [1] we are introducing a new parallel submission uAPI for the i915 which allows more than 1 BB to be submitted in an execbuf IOCTL. This is the implemenation for both GuC and execlists. In addition to selftests in the series, an IGT is available implemented in the first 4 patches [2]. Media UMD changes to land soon. This series is broken into 5 parts. 1. A series of GuC patches which introduces a state machine to deal with flow control conditions gracefully (e.g. don't punt them to the user). These are patches 1-12. 2. Update the GuC backend / connections to uAPI to configure it for parallel submission. These are patches 13-30. 3. Update execbuf IOCTL to accept more than 1 BB in a single IOCTL. These are patches 31-44. 4. A weak execlists implemenation for parallel submission. Patch 45. 5. Add a heuristic to enable issue schedule disables immediately after unpin. Not all that related but wanted to get this out on the list for review and based on the tip of all of these patches. Patch 46. Signed-off-by: Matthew Brost <matthew.brost@intel.com> [1] https://patchwork.freedesktop.org/series/92028/ [2] https://patchwork.freedesktop.org/series/93071/ Matthew Brost (46): drm/i915/guc: Allow flexible number of context ids drm/i915/guc: Connect the number of guc_ids to debugfs drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted drm/i915/guc: Don't allow requests not ready to consume all guc_ids drm/i915/guc: Introduce guc_submit_engine object drm/i915/guc: Check return of __xa_store when registering a context drm/i915/guc: Non-static lrc descriptor registration buffer drm/i915/guc: Take GT PM ref when deregistering context drm/i915: Add GT PM unpark worker drm/i915/guc: Take engine PM when a context is pinned with GuC submission drm/i915/guc: Don't call switch_to_kernel_context with GuC submission drm/i915/guc: Selftest for GuC flow control drm/i915: Add logical engine mapping drm/i915: Expose logical engine instance to user drm/i915/guc: Introduce context parent-child relationship drm/i915/guc: Implement GuC parent-child context pin / unpin functions drm/i915/guc: Add multi-lrc context registration drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids drm/i915/guc: Add hang check to GuC submit engine drm/i915/guc: Add guc_child_context_destroy drm/i915/guc: Implement multi-lrc submission drm/i915/guc: Insert submit fences between requests in parent-child relationship drm/i915/guc: Implement multi-lrc reset drm/i915/guc: Update debugfs for GuC multi-lrc drm/i915: Connect UAPI to GuC multi-lrc interface drm/i915/doc: Update parallel submit doc to point to i915_drm.h drm/i915/guc: Add basic GuC multi-lrc selftest drm/i915/guc: Extend GuC flow control selftest for multi-lrc drm/i915/guc: Implement no mid batch preemption for multi-lrc drm/i915: Move secure execbuf check to execbuf2 drm/i915: Move input/exec fence handling to i915_gem_execbuffer2 drm/i915: Move output fence handling to i915_gem_execbuffer2 drm/i915: Return output fence from i915_gem_do_execbuffer drm/i915: Store batch index in struct i915_execbuffer drm/i915: Allow callers of i915_gem_do_execbuffer to override the batch index drm/i915: Teach execbuf there can be more than one batch in the objects list drm/i915: Only track object dependencies on first request drm/i915: Force parallel contexts to use copy engine for reloc drm/i915: Multi-batch execbuffer2 drm/i915: Eliminate unnecessary VMA calls for multi-BB submission drm/i915: Hold all parallel requests until last request, properly handle error drm/i915/guc: Handle errors in multi-lrc requests drm/i915: Enable multi-bb execbuf drm/i915/execlists: Weak parallel submission support for execlists drm/i915/guc: Add delay before disabling scheduling on contexts Documentation/gpu/rfc/i915_parallel_execbuf.h | 122 - Documentation/gpu/rfc/i915_scheduler.rst | 4 +- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gem/i915_gem_context.c | 159 +- .../gpu/drm/i915/gem/i915_gem_context_types.h | 6 + .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 582 ++- .../i915/gem/selftests/i915_gem_coherency.c | 2 +- .../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +- .../i915/gem/selftests/i915_gem_execbuffer.c | 14 +- .../drm/i915/gem/selftests/i915_gem_mman.c | 2 +- .../drm/i915/gem/selftests/i915_gem_object.c | 2 +- drivers/gpu/drm/i915/gt/intel_context.c | 236 +- drivers/gpu/drm/i915/gt/intel_context.h | 81 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 62 +- drivers/gpu/drm/i915/gt/intel_engine.h | 12 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 66 +- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 + drivers/gpu/drm/i915/gt/intel_engine_pm.h | 5 + drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + .../drm/i915/gt/intel_execlists_submission.c | 233 +- drivers/gpu/drm/i915/gt/intel_gt.c | 3 + drivers/gpu/drm/i915/gt/intel_gt_pm.c | 8 + drivers/gpu/drm/i915/gt/intel_gt_pm.h | 13 + .../gpu/drm/i915/gt/intel_gt_pm_unpark_work.c | 35 + .../gpu/drm/i915/gt/intel_gt_pm_unpark_work.h | 32 + drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + drivers/gpu/drm/i915/gt/intel_lrc.c | 31 +- drivers/gpu/drm/i915/gt/intel_lrc.h | 6 +- drivers/gpu/drm/i915/gt/intel_reset.c | 10 + .../gpu/drm/i915/gt/intel_ring_submission.c | 5 +- drivers/gpu/drm/i915/gt/mock_engine.c | 4 +- drivers/gpu/drm/i915/gt/selftest_execlists.c | 12 +- .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc.h | 46 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 43 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 + .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 59 + drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 10 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 3159 +++++++++++++++-- .../gpu/drm/i915/gt/uc/intel_guc_submission.h | 2 + .../i915/gt/uc/intel_guc_submission_types.h | 67 + .../i915/gt/uc/selftest_guc_flow_control.c | 891 +++++ .../drm/i915/gt/uc/selftest_guc_multi_lrc.c | 179 + drivers/gpu/drm/i915/i915_query.c | 2 + drivers/gpu/drm/i915/i915_request.c | 120 +- drivers/gpu/drm/i915/i915_request.h | 23 + drivers/gpu/drm/i915/i915_scheduler.c | 22 +- drivers/gpu/drm/i915/i915_scheduler.h | 3 + drivers/gpu/drm/i915/i915_selftest.h | 2 + drivers/gpu/drm/i915/i915_trace.h | 10 + drivers/gpu/drm/i915/i915_vma.c | 13 +- drivers/gpu/drm/i915/i915_vma.h | 16 +- drivers/gpu/drm/i915/intel_wakeref.c | 5 + drivers/gpu/drm/i915/intel_wakeref.h | 1 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +- .../drm/i915/selftests/i915_live_selftests.h | 2 + drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +- drivers/gpu/drm/i915/selftests/i915_request.c | 2 +- drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +- .../i915/selftests/intel_scheduler_helpers.c | 12 + .../i915/selftests/intel_scheduler_helpers.h | 2 + include/uapi/drm/i915_drm.h | 136 +- 63 files changed, 5741 insertions(+), 862 deletions(-) delete mode 100644 Documentation/gpu/rfc/i915_parallel_execbuf.h create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_unpark_work.c create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_unpark_work.h create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_submission_types.h create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc_flow_control.c create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c -- 2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com> To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org> Subject: [Intel-gfx] [PATCH 00/46] Parallel submission aka multi-bb execbuf Date: Tue, 3 Aug 2021 15:28:57 -0700 [thread overview] Message-ID: <20210803222943.27686-1-matthew.brost@intel.com> (raw) As discussed in [1] we are introducing a new parallel submission uAPI for the i915 which allows more than 1 BB to be submitted in an execbuf IOCTL. This is the implemenation for both GuC and execlists. In addition to selftests in the series, an IGT is available implemented in the first 4 patches [2]. Media UMD changes to land soon. This series is broken into 5 parts. 1. A series of GuC patches which introduces a state machine to deal with flow control conditions gracefully (e.g. don't punt them to the user). These are patches 1-12. 2. Update the GuC backend / connections to uAPI to configure it for parallel submission. These are patches 13-30. 3. Update execbuf IOCTL to accept more than 1 BB in a single IOCTL. These are patches 31-44. 4. A weak execlists implemenation for parallel submission. Patch 45. 5. Add a heuristic to enable issue schedule disables immediately after unpin. Not all that related but wanted to get this out on the list for review and based on the tip of all of these patches. Patch 46. Signed-off-by: Matthew Brost <matthew.brost@intel.com> [1] https://patchwork.freedesktop.org/series/92028/ [2] https://patchwork.freedesktop.org/series/93071/ Matthew Brost (46): drm/i915/guc: Allow flexible number of context ids drm/i915/guc: Connect the number of guc_ids to debugfs drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted drm/i915/guc: Don't allow requests not ready to consume all guc_ids drm/i915/guc: Introduce guc_submit_engine object drm/i915/guc: Check return of __xa_store when registering a context drm/i915/guc: Non-static lrc descriptor registration buffer drm/i915/guc: Take GT PM ref when deregistering context drm/i915: Add GT PM unpark worker drm/i915/guc: Take engine PM when a context is pinned with GuC submission drm/i915/guc: Don't call switch_to_kernel_context with GuC submission drm/i915/guc: Selftest for GuC flow control drm/i915: Add logical engine mapping drm/i915: Expose logical engine instance to user drm/i915/guc: Introduce context parent-child relationship drm/i915/guc: Implement GuC parent-child context pin / unpin functions drm/i915/guc: Add multi-lrc context registration drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids drm/i915/guc: Add hang check to GuC submit engine drm/i915/guc: Add guc_child_context_destroy drm/i915/guc: Implement multi-lrc submission drm/i915/guc: Insert submit fences between requests in parent-child relationship drm/i915/guc: Implement multi-lrc reset drm/i915/guc: Update debugfs for GuC multi-lrc drm/i915: Connect UAPI to GuC multi-lrc interface drm/i915/doc: Update parallel submit doc to point to i915_drm.h drm/i915/guc: Add basic GuC multi-lrc selftest drm/i915/guc: Extend GuC flow control selftest for multi-lrc drm/i915/guc: Implement no mid batch preemption for multi-lrc drm/i915: Move secure execbuf check to execbuf2 drm/i915: Move input/exec fence handling to i915_gem_execbuffer2 drm/i915: Move output fence handling to i915_gem_execbuffer2 drm/i915: Return output fence from i915_gem_do_execbuffer drm/i915: Store batch index in struct i915_execbuffer drm/i915: Allow callers of i915_gem_do_execbuffer to override the batch index drm/i915: Teach execbuf there can be more than one batch in the objects list drm/i915: Only track object dependencies on first request drm/i915: Force parallel contexts to use copy engine for reloc drm/i915: Multi-batch execbuffer2 drm/i915: Eliminate unnecessary VMA calls for multi-BB submission drm/i915: Hold all parallel requests until last request, properly handle error drm/i915/guc: Handle errors in multi-lrc requests drm/i915: Enable multi-bb execbuf drm/i915/execlists: Weak parallel submission support for execlists drm/i915/guc: Add delay before disabling scheduling on contexts Documentation/gpu/rfc/i915_parallel_execbuf.h | 122 - Documentation/gpu/rfc/i915_scheduler.rst | 4 +- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gem/i915_gem_context.c | 159 +- .../gpu/drm/i915/gem/i915_gem_context_types.h | 6 + .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 582 ++- .../i915/gem/selftests/i915_gem_coherency.c | 2 +- .../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +- .../i915/gem/selftests/i915_gem_execbuffer.c | 14 +- .../drm/i915/gem/selftests/i915_gem_mman.c | 2 +- .../drm/i915/gem/selftests/i915_gem_object.c | 2 +- drivers/gpu/drm/i915/gt/intel_context.c | 236 +- drivers/gpu/drm/i915/gt/intel_context.h | 81 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 62 +- drivers/gpu/drm/i915/gt/intel_engine.h | 12 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 66 +- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 + drivers/gpu/drm/i915/gt/intel_engine_pm.h | 5 + drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + .../drm/i915/gt/intel_execlists_submission.c | 233 +- drivers/gpu/drm/i915/gt/intel_gt.c | 3 + drivers/gpu/drm/i915/gt/intel_gt_pm.c | 8 + drivers/gpu/drm/i915/gt/intel_gt_pm.h | 13 + .../gpu/drm/i915/gt/intel_gt_pm_unpark_work.c | 35 + .../gpu/drm/i915/gt/intel_gt_pm_unpark_work.h | 32 + drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + drivers/gpu/drm/i915/gt/intel_lrc.c | 31 +- drivers/gpu/drm/i915/gt/intel_lrc.h | 6 +- drivers/gpu/drm/i915/gt/intel_reset.c | 10 + .../gpu/drm/i915/gt/intel_ring_submission.c | 5 +- drivers/gpu/drm/i915/gt/mock_engine.c | 4 +- drivers/gpu/drm/i915/gt/selftest_execlists.c | 12 +- .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc.h | 46 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 43 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 + .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 59 + drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 10 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 3159 +++++++++++++++-- .../gpu/drm/i915/gt/uc/intel_guc_submission.h | 2 + .../i915/gt/uc/intel_guc_submission_types.h | 67 + .../i915/gt/uc/selftest_guc_flow_control.c | 891 +++++ .../drm/i915/gt/uc/selftest_guc_multi_lrc.c | 179 + drivers/gpu/drm/i915/i915_query.c | 2 + drivers/gpu/drm/i915/i915_request.c | 120 +- drivers/gpu/drm/i915/i915_request.h | 23 + drivers/gpu/drm/i915/i915_scheduler.c | 22 +- drivers/gpu/drm/i915/i915_scheduler.h | 3 + drivers/gpu/drm/i915/i915_selftest.h | 2 + drivers/gpu/drm/i915/i915_trace.h | 10 + drivers/gpu/drm/i915/i915_vma.c | 13 +- drivers/gpu/drm/i915/i915_vma.h | 16 +- drivers/gpu/drm/i915/intel_wakeref.c | 5 + drivers/gpu/drm/i915/intel_wakeref.h | 1 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +- .../drm/i915/selftests/i915_live_selftests.h | 2 + drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +- drivers/gpu/drm/i915/selftests/i915_request.c | 2 +- drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +- .../i915/selftests/intel_scheduler_helpers.c | 12 + .../i915/selftests/intel_scheduler_helpers.h | 2 + include/uapi/drm/i915_drm.h | 136 +- 63 files changed, 5741 insertions(+), 862 deletions(-) delete mode 100644 Documentation/gpu/rfc/i915_parallel_execbuf.h create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_unpark_work.c create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_unpark_work.h create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_guc_submission_types.h create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc_flow_control.c create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c -- 2.28.0
next reply other threads:[~2021-08-03 22:11 UTC|newest] Thread overview: 186+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-03 22:28 Matthew Brost [this message] 2021-08-03 22:28 ` [Intel-gfx] [PATCH 00/46] Parallel submission aka multi-bb execbuf Matthew Brost 2021-08-03 22:28 ` [PATCH 01/46] drm/i915/guc: Allow flexible number of context ids Matthew Brost 2021-08-03 22:28 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:28 ` [PATCH 02/46] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost 2021-08-03 22:28 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 03/46] drm/i915/guc: Don't return -EAGAIN to user when guc_ids exhausted Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-05 8:27 ` Daniel Vetter 2021-08-05 8:27 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 04/46] drm/i915/guc: Don't allow requests not ready to consume all guc_ids Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-05 8:29 ` Daniel Vetter 2021-08-03 22:29 ` [PATCH 05/46] drm/i915/guc: Introduce guc_submit_engine object Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 06/46] drm/i915/guc: Check return of __xa_store when registering a context Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 07/46] drm/i915/guc: Non-static lrc descriptor registration buffer Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 08/46] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 09/46] drm/i915: Add GT PM unpark worker Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 10/46] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 14:23 ` Daniel Vetter 2021-08-09 14:23 ` [Intel-gfx] " Daniel Vetter 2021-08-09 18:11 ` Matthew Brost 2021-08-09 18:11 ` [Intel-gfx] " Matthew Brost 2021-08-10 6:43 ` Daniel Vetter 2021-08-10 6:43 ` [Intel-gfx] " Daniel Vetter 2021-08-10 21:29 ` Matthew Brost 2021-08-10 21:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 11/46] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 14:27 ` Daniel Vetter 2021-08-09 18:20 ` Matthew Brost 2021-08-10 6:47 ` Daniel Vetter 2021-08-11 17:47 ` Matthew Brost 2021-08-03 22:29 ` [PATCH 12/46] drm/i915/guc: Selftest for GuC flow control Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 13/46] drm/i915: Add logical engine mapping Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 14:28 ` Daniel Vetter 2021-08-09 14:28 ` [Intel-gfx] " Daniel Vetter 2021-08-09 18:28 ` Matthew Brost 2021-08-09 18:28 ` [Intel-gfx] " Matthew Brost 2021-08-10 6:49 ` Daniel Vetter 2021-08-10 6:49 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 14/46] drm/i915: Expose logical engine instance to user Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 14:30 ` Daniel Vetter 2021-08-09 14:30 ` [Intel-gfx] " Daniel Vetter 2021-08-09 18:37 ` Matthew Brost 2021-08-09 18:37 ` [Intel-gfx] " Matthew Brost 2021-08-10 6:53 ` Daniel Vetter 2021-08-10 6:53 ` [Intel-gfx] " Daniel Vetter 2021-08-11 17:55 ` Matthew Brost 2021-08-11 17:55 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 15/46] drm/i915/guc: Introduce context parent-child relationship Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 14:37 ` Daniel Vetter 2021-08-09 14:40 ` Daniel Vetter 2021-08-09 18:45 ` Matthew Brost 2021-08-09 18:44 ` Matthew Brost 2021-08-10 8:45 ` Daniel Vetter 2021-08-03 22:29 ` [PATCH 16/46] drm/i915/guc: Implement GuC parent-child context pin / unpin functions Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 15:17 ` Daniel Vetter 2021-08-09 18:58 ` Matthew Brost 2021-08-10 8:53 ` Daniel Vetter 2021-08-10 9:07 ` Daniel Vetter 2021-08-11 18:06 ` Matthew Brost 2021-08-12 14:45 ` Daniel Vetter 2021-08-12 14:52 ` Daniel Vetter 2021-08-11 18:23 ` Matthew Brost 2021-08-03 22:29 ` [PATCH 17/46] drm/i915/guc: Add multi-lrc context registration Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 18/46] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 19/46] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 15:31 ` Daniel Vetter 2021-08-09 15:31 ` [Intel-gfx] " Daniel Vetter 2021-08-09 19:03 ` Matthew Brost 2021-08-09 19:03 ` [Intel-gfx] " Matthew Brost 2021-08-10 9:12 ` Daniel Vetter 2021-08-10 9:12 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 20/46] drm/i915/guc: Add hang check to GuC submit engine Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 15:35 ` Daniel Vetter 2021-08-09 15:35 ` [Intel-gfx] " Daniel Vetter 2021-08-09 19:05 ` Matthew Brost 2021-08-09 19:05 ` [Intel-gfx] " Matthew Brost 2021-08-10 9:18 ` Daniel Vetter 2021-08-10 9:18 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 21/46] drm/i915/guc: Add guc_child_context_destroy Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 15:36 ` Daniel Vetter 2021-08-09 19:06 ` Matthew Brost 2021-08-03 22:29 ` [PATCH 22/46] drm/i915/guc: Implement multi-lrc submission Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 23/46] drm/i915/guc: Insert submit fences between requests in parent-child relationship Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 16:32 ` Daniel Vetter 2021-08-09 16:39 ` Matthew Brost 2021-08-09 17:03 ` Daniel Vetter 2021-08-03 22:29 ` [PATCH 24/46] drm/i915/guc: Implement multi-lrc reset Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 25/46] drm/i915/guc: Update debugfs for GuC multi-lrc Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 16:36 ` Daniel Vetter 2021-08-09 16:36 ` [Intel-gfx] " Daniel Vetter 2021-08-09 19:13 ` Matthew Brost 2021-08-09 19:13 ` [Intel-gfx] " Matthew Brost 2021-08-10 9:23 ` Daniel Vetter 2021-08-10 9:23 ` [Intel-gfx] " Daniel Vetter 2021-08-10 9:27 ` Daniel Vetter 2021-08-10 9:27 ` [Intel-gfx] " Daniel Vetter 2021-08-10 17:29 ` Matthew Brost 2021-08-10 17:29 ` [Intel-gfx] " Matthew Brost 2021-08-11 10:04 ` Daniel Vetter 2021-08-11 10:04 ` [Intel-gfx] " Daniel Vetter 2021-08-11 17:35 ` Matthew Brost 2021-08-11 17:35 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 26/46] drm/i915: Connect UAPI to GuC multi-lrc interface Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 16:37 ` Daniel Vetter 2021-08-09 16:37 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 27/46] drm/i915/doc: Update parallel submit doc to point to i915_drm.h Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 28/46] drm/i915/guc: Add basic GuC multi-lrc selftest Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 29/46] drm/i915/guc: Extend GuC flow control selftest for multi-lrc Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 30/46] drm/i915/guc: Implement no mid batch preemption " Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 31/46] drm/i915: Move secure execbuf check to execbuf2 Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 32/46] drm/i915: Move input/exec fence handling to i915_gem_execbuffer2 Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 33/46] drm/i915: Move output " Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 34/46] drm/i915: Return output fence from i915_gem_do_execbuffer Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 35/46] drm/i915: Store batch index in struct i915_execbuffer Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 36/46] drm/i915: Allow callers of i915_gem_do_execbuffer to override the batch index Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 37/46] drm/i915: Teach execbuf there can be more than one batch in the objects list Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 38/46] drm/i915: Only track object dependencies on first request Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 39/46] drm/i915: Force parallel contexts to use copy engine for reloc Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 16:39 ` Daniel Vetter 2021-08-09 16:39 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 40/46] drm/i915: Multi-batch execbuffer2 Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 17:02 ` Daniel Vetter 2021-08-09 17:02 ` [Intel-gfx] " Daniel Vetter 2021-08-03 22:29 ` [PATCH 41/46] drm/i915: Eliminate unnecessary VMA calls for multi-BB submission Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 17:07 ` Daniel Vetter 2021-08-09 17:12 ` Daniel Vetter 2021-08-03 22:29 ` [PATCH 42/46] drm/i915: Hold all parallel requests until last request, properly handle error Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 43/46] drm/i915/guc: Handle errors in multi-lrc requests Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 44/46] drm/i915: Enable multi-bb execbuf Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 45/46] drm/i915/execlists: Weak parallel submission support for execlists Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-03 22:29 ` [PATCH 46/46] drm/i915/guc: Add delay before disabling scheduling on contexts Matthew Brost 2021-08-03 22:29 ` [Intel-gfx] " Matthew Brost 2021-08-09 17:17 ` Daniel Vetter 2021-08-09 19:32 ` Matthew Brost 2021-08-11 9:55 ` Daniel Vetter 2021-08-11 17:43 ` Matthew Brost 2021-08-12 14:04 ` Daniel Vetter 2021-08-12 19:26 ` Daniel Vetter 2021-08-03 22:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev2) Patchwork 2021-08-03 22:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-08-03 22:57 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork 2021-08-03 23:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-05 3:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210803222943.27686-1-matthew.brost@intel.com \ --to=matthew.brost@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.