From: Richard Fitzgerald <rf@opensource.cirrus.com> To: <broonie@kernel.org> Cc: <alsa-devel@alsa-project.org>, <patches@opensource.cirrus.com>, <linux-kernel@vger.kernel.org>, Richard Fitzgerald <rf@opensource.cirrus.com> Subject: [PATCH 7/8] ASoC: cs42l42: Assume 24-bit samples are in 32-bit slots Date: Thu, 5 Aug 2021 17:11:10 +0100 [thread overview] Message-ID: <20210805161111.10410-7-rf@opensource.cirrus.com> (raw) In-Reply-To: <20210805161111.10410-1-rf@opensource.cirrus.com> If the machine driver doesn't call snd_soc_dai_set_sysclk() the SCLK is assumed to be sample_rate * sample_bits * 2 (that is, the rate necessary for a standard I2S frame). But 24-bit samples can be sent in either a 24-bit slot or a 32-bit slot. If the PLL is configured for a 24-bit slot, but a 32-bit slot is used, cs42l42 will be overclocked. Ultimately it is the machine driver's responsibilty to call snd_soc_dai_set_sysclk() if SLK will be different from the standard I2S rate. However, it is convenient to assume 32-bit slots to allow this common case without needing special machine driver support. The machine driver then only has to set SCLK if the slots are 24-bit, but if it fails to do this cs42l42 won't be overclocked. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> --- sound/soc/codecs/cs42l42.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index b2ee51443a22..3677ed4670d0 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -844,6 +844,13 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream, if (channels == 1) cs42l42->bclk *= 2; + /* + * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being + * more than assumed (which would result in overclocking). + */ + if (params_width(params) == 24) + cs42l42->bclk = (cs42l42->bclk / 3) * 4; + switch(substream->stream) { case SNDRV_PCM_STREAM_CAPTURE: if (channels == 2) { -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Richard Fitzgerald <rf@opensource.cirrus.com> To: <broonie@kernel.org> Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, Richard Fitzgerald <rf@opensource.cirrus.com>, linux-kernel@vger.kernel.org Subject: [PATCH 7/8] ASoC: cs42l42: Assume 24-bit samples are in 32-bit slots Date: Thu, 5 Aug 2021 17:11:10 +0100 [thread overview] Message-ID: <20210805161111.10410-7-rf@opensource.cirrus.com> (raw) In-Reply-To: <20210805161111.10410-1-rf@opensource.cirrus.com> If the machine driver doesn't call snd_soc_dai_set_sysclk() the SCLK is assumed to be sample_rate * sample_bits * 2 (that is, the rate necessary for a standard I2S frame). But 24-bit samples can be sent in either a 24-bit slot or a 32-bit slot. If the PLL is configured for a 24-bit slot, but a 32-bit slot is used, cs42l42 will be overclocked. Ultimately it is the machine driver's responsibilty to call snd_soc_dai_set_sysclk() if SLK will be different from the standard I2S rate. However, it is convenient to assume 32-bit slots to allow this common case without needing special machine driver support. The machine driver then only has to set SCLK if the slots are 24-bit, but if it fails to do this cs42l42 won't be overclocked. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> --- sound/soc/codecs/cs42l42.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index b2ee51443a22..3677ed4670d0 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -844,6 +844,13 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream, if (channels == 1) cs42l42->bclk *= 2; + /* + * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being + * more than assumed (which would result in overclocking). + */ + if (params_width(params) == 24) + cs42l42->bclk = (cs42l42->bclk / 3) * 4; + switch(substream->stream) { case SNDRV_PCM_STREAM_CAPTURE: if (channels == 2) { -- 2.11.0
next prev parent reply other threads:[~2021-08-05 16:11 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-05 16:11 [PATCH 1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-05 16:11 ` [PATCH 2/8] ASoC: cs42l42: Fix LRCLK frame start edge Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-05 16:11 ` [PATCH 3/8] ASoC: cs42l42: Constrain sample rate to prevent illegal SCLK Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-05 16:11 ` [PATCH 4/8] ASoC: cs42l42: Fix mono playback Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-05 16:11 ` [PATCH 5/8] ASoC: cs42l42: Add PLL configuration for 44.1kHz/16-bit Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-05 16:11 ` [PATCH 6/8] ASoC: cs42l42: Validate dai_set_sysclk() frequency Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald [this message] 2021-08-05 16:11 ` [PATCH 7/8] ASoC: cs42l42: Assume 24-bit samples are in 32-bit slots Richard Fitzgerald 2021-08-05 16:11 ` [PATCH 8/8] ASoC: cs42l42: Update module authors Richard Fitzgerald 2021-08-05 16:11 ` Richard Fitzgerald 2021-08-06 0:45 ` [PATCH 1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL Mark Brown 2021-08-06 0:45 ` Mark Brown 2021-08-06 0:47 ` Mark Brown 2021-08-06 0:47 ` Mark Brown 2021-08-06 0:56 ` Mark Brown 2021-08-06 0:56 ` Mark Brown
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