From: Vineet Gupta <vgupta@kernel.org> To: linux-snps-arc@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Anshuman Khandual <anshuman.khandual@arm.com>, Mike Rapoport <rppt@kernel.org>, Vineet Gupta <vgupta@kernel.org> Subject: [PATCH 00/18] ARC mm updates to support 3 or 4 levels of paging Date: Tue, 10 Aug 2021 17:42:40 -0700 [thread overview] Message-ID: <20210811004258.138075-1-vgupta@kernel.org> (raw) Hi, Big pile of ARC mm changes to prepare for 3 or 4 levels of paging (from current 2) needed for new hardware page walked MMUv6 (in aRCv3 ISA based cores). Most of these changes are incremental cleanups to make way for 14/18 and 15/18 which actually imeplement the new levels (in existing ARCv2 port) and worth a critical eye. CC'ing some of you guys dealing with page tables for a while :-) to spot any obvious gotchas. Thx, -Vineet Vineet Gupta (18): ARC: mm: simplify mmu scratch register assingment to mmu needs ARC: mm: remove tlb paranoid code ARC: mm: move mmu/cache externs out to setup.h ARC: mm: remove pgd_offset_fast ARC: mm: Fixes to allow STRICT_MM_TYPECHECKS ARC: mm: Enable STRICT_MM_TYPECHECKS ARC: ioremap: use more commonly used PAGE_KERNEL based uncached flag ARC: mm: pmd_populate* to use the canonical set_pmd (and drop pmd_set) ARC: mm: non-functional code cleanup ahead of 3 levels ARC: mm: move MMU specific bits out of ASID allocator ARC: mm: move MMU specific bits out of entry code ARC: mm: disintegrate mmu.h (arcv2 bits out) ARC: mm: disintegrate pgtable.h into levels and flags ARC: mm: hack to allow 2 level build with 4 level code ARC: mm: support 3 levels of page tables ARC: mm: support 4 levels of page tables ARC: mm: vmalloc sync from kernel to user table to update PMD ... ARC: mm: introduce _PAGE_TABLE to explicitly link pgd,pud,pmd entries arch/arc/Kconfig | 7 +- arch/arc/include/asm/cache.h | 4 - arch/arc/include/asm/entry-compact.h | 8 - arch/arc/include/asm/mmu-arcv2.h | 94 +++++++ arch/arc/include/asm/mmu.h | 73 +---- arch/arc/include/asm/mmu_context.h | 29 +- arch/arc/include/asm/page.h | 72 +++-- arch/arc/include/asm/pgalloc.h | 70 ++++- arch/arc/include/asm/pgtable-bits-arcv2.h | 151 +++++++++++ arch/arc/include/asm/pgtable-levels.h | 179 ++++++++++++ arch/arc/include/asm/pgtable.h | 315 +--------------------- arch/arc/include/asm/processor.h | 2 +- arch/arc/include/asm/setup.h | 12 +- arch/arc/kernel/entry.S | 6 - arch/arc/mm/fault.c | 20 +- arch/arc/mm/ioremap.c | 3 +- arch/arc/mm/tlb.c | 71 ++--- arch/arc/mm/tlbex.S | 80 ++---- 18 files changed, 617 insertions(+), 579 deletions(-) create mode 100644 arch/arc/include/asm/mmu-arcv2.h create mode 100644 arch/arc/include/asm/pgtable-bits-arcv2.h create mode 100644 arch/arc/include/asm/pgtable-levels.h -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Vineet Gupta <vgupta@kernel.org> To: linux-snps-arc@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Anshuman Khandual <anshuman.khandual@arm.com>, Mike Rapoport <rppt@kernel.org>, Vineet Gupta <vgupta@kernel.org> Subject: [PATCH 00/18] ARC mm updates to support 3 or 4 levels of paging Date: Tue, 10 Aug 2021 17:42:40 -0700 [thread overview] Message-ID: <20210811004258.138075-1-vgupta@kernel.org> (raw) Hi, Big pile of ARC mm changes to prepare for 3 or 4 levels of paging (from current 2) needed for new hardware page walked MMUv6 (in aRCv3 ISA based cores). Most of these changes are incremental cleanups to make way for 14/18 and 15/18 which actually imeplement the new levels (in existing ARCv2 port) and worth a critical eye. CC'ing some of you guys dealing with page tables for a while :-) to spot any obvious gotchas. Thx, -Vineet Vineet Gupta (18): ARC: mm: simplify mmu scratch register assingment to mmu needs ARC: mm: remove tlb paranoid code ARC: mm: move mmu/cache externs out to setup.h ARC: mm: remove pgd_offset_fast ARC: mm: Fixes to allow STRICT_MM_TYPECHECKS ARC: mm: Enable STRICT_MM_TYPECHECKS ARC: ioremap: use more commonly used PAGE_KERNEL based uncached flag ARC: mm: pmd_populate* to use the canonical set_pmd (and drop pmd_set) ARC: mm: non-functional code cleanup ahead of 3 levels ARC: mm: move MMU specific bits out of ASID allocator ARC: mm: move MMU specific bits out of entry code ARC: mm: disintegrate mmu.h (arcv2 bits out) ARC: mm: disintegrate pgtable.h into levels and flags ARC: mm: hack to allow 2 level build with 4 level code ARC: mm: support 3 levels of page tables ARC: mm: support 4 levels of page tables ARC: mm: vmalloc sync from kernel to user table to update PMD ... ARC: mm: introduce _PAGE_TABLE to explicitly link pgd,pud,pmd entries arch/arc/Kconfig | 7 +- arch/arc/include/asm/cache.h | 4 - arch/arc/include/asm/entry-compact.h | 8 - arch/arc/include/asm/mmu-arcv2.h | 94 +++++++ arch/arc/include/asm/mmu.h | 73 +---- arch/arc/include/asm/mmu_context.h | 29 +- arch/arc/include/asm/page.h | 72 +++-- arch/arc/include/asm/pgalloc.h | 70 ++++- arch/arc/include/asm/pgtable-bits-arcv2.h | 151 +++++++++++ arch/arc/include/asm/pgtable-levels.h | 179 ++++++++++++ arch/arc/include/asm/pgtable.h | 315 +--------------------- arch/arc/include/asm/processor.h | 2 +- arch/arc/include/asm/setup.h | 12 +- arch/arc/kernel/entry.S | 6 - arch/arc/mm/fault.c | 20 +- arch/arc/mm/ioremap.c | 3 +- arch/arc/mm/tlb.c | 71 ++--- arch/arc/mm/tlbex.S | 80 ++---- 18 files changed, 617 insertions(+), 579 deletions(-) create mode 100644 arch/arc/include/asm/mmu-arcv2.h create mode 100644 arch/arc/include/asm/pgtable-bits-arcv2.h create mode 100644 arch/arc/include/asm/pgtable-levels.h -- 2.25.1 _______________________________________________ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
next reply other threads:[~2021-08-11 0:43 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-11 0:42 Vineet Gupta [this message] 2021-08-11 0:42 ` [PATCH 00/18] ARC mm updates to support 3 or 4 levels of paging Vineet Gupta 2021-08-11 0:42 ` [PATCH 01/18] ARC: mm: simplify mmu scratch register assingment to mmu needs Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 02/18] ARC: mm: remove tlb paranoid code Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 03/18] ARC: mm: move mmu/cache externs out to setup.h Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 5:10 ` Mike Rapoport 2021-08-11 5:10 ` Mike Rapoport 2021-08-11 18:46 ` Vineet Gupta 2021-08-11 18:46 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 04/18] ARC: mm: remove pgd_offset_fast Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 5:12 ` Mike Rapoport 2021-08-11 5:12 ` Mike Rapoport 2021-08-11 18:54 ` Vineet Gupta 2021-08-11 18:54 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 05/18] ARC: mm: Fixes to allow STRICT_MM_TYPECHECKS Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 06/18] ARC: mm: Enable STRICT_MM_TYPECHECKS Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 12:04 ` Mike Rapoport 2021-08-11 12:04 ` Mike Rapoport 2021-08-11 19:01 ` Vineet Gupta 2021-08-11 19:01 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 07/18] ARC: ioremap: use more commonly used PAGE_KERNEL based uncached flag Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 5:18 ` Mike Rapoport 2021-08-11 5:18 ` Mike Rapoport 2021-08-11 18:58 ` Vineet Gupta 2021-08-11 18:58 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 08/18] ARC: mm: pmd_populate* to use the canonical set_pmd (and drop pmd_set) Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 09/18] ARC: mm: non-functional code cleanup ahead of 3 levels Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 12:31 ` Mike Rapoport 2021-08-11 12:31 ` Mike Rapoport 2021-08-12 1:37 ` Vineet Gupta 2021-08-12 1:37 ` Vineet Gupta 2021-08-12 6:18 ` Mike Rapoport 2021-08-12 6:18 ` Mike Rapoport 2021-08-12 18:58 ` Vineet Gupta 2021-08-12 18:58 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 10/18] ARC: mm: move MMU specific bits out of ASID allocator Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 11/18] ARC: mm: move MMU specific bits out of entry code Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 12:15 ` Mike Rapoport 2021-08-11 12:15 ` Mike Rapoport 2021-08-11 19:30 ` Vineet Gupta 2021-08-11 19:30 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 12/18] ARC: mm: disintegrate mmu.h (arcv2 bits out) Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 13/18] ARC: mm: disintegrate pgtable.h into levels and flags Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 14/18] ARC: mm: hack to allow 2 level build with 4 level code Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 15/18] ARC: mm: support 3 levels of page tables Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 12:24 ` Mike Rapoport 2021-08-11 12:24 ` Mike Rapoport 2021-08-11 22:15 ` Vineet Gupta 2021-08-11 22:15 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 16/18] ARC: mm: support 4 " Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 12:28 ` Mike Rapoport 2021-08-11 12:28 ` Mike Rapoport 2021-08-11 22:17 ` Vineet Gupta 2021-08-11 22:17 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 17/18] ARC: mm: vmalloc sync from kernel to user table to update PMD Vineet Gupta 2021-08-11 0:42 ` Vineet Gupta 2021-08-11 0:42 ` [PATCH 18/18] ARC: mm: introduce _PAGE_TABLE to explicitly link pgd,pud,pmd entries Vineet Gupta 2021-08-11 0:42 ` [PATCH 18/18] ARC: mm: introduce _PAGE_TABLE to explicitly link pgd, pud, pmd entries Vineet Gupta
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