From: Boris Brezillon <boris.brezillon@collabora.com> To: Apurva Nandan <a-nandan@ti.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Patrice Chotard <patrice.chotard@foss.st.com>, Christophe Kerello <christophe.kerello@foss.st.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <p.yadav@ti.com> Subject: Re: [PATCH v2 11/14] mtd: spinand: Perform Power-on-Reset on the flash in mtd_suspend() Date: Tue, 12 Oct 2021 09:25:08 +0200 [thread overview] Message-ID: <20211012092508.1647047b@collabora.com> (raw) In-Reply-To: <20211011204619.81893-12-a-nandan@ti.com> On Tue, 12 Oct 2021 02:16:16 +0530 Apurva Nandan <a-nandan@ti.com> wrote: > A soft reset using FFh command doesn't erase the flash's configuration > and doesn't reset the SPI IO mode also. This can result in the flash > being in a different SPI IO mode, e.g. Octal DTR, when resuming from > sleep. This could put the flash in an unrecognized SPI IO mode, making > it unusable. > > Perform a Power-on-Reset (PoR), if available in the flash, when > performing mtd_suspend(). This would set the flash to clean > state for reinitialization during resume and would also ensure that it > is in standard SPI IO mode (1S-1S-1S) before the resume begins. > > Signed-off-by: Apurva Nandan <a-nandan@ti.com> > --- > drivers/mtd/nand/spi/core.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c > index 9b570570ee81..60408531979a 100644 > --- a/drivers/mtd/nand/spi/core.c > +++ b/drivers/mtd/nand/spi/core.c > @@ -1316,6 +1316,11 @@ static void spinand_mtd_resume(struct mtd_info *mtd) > int ret; > > spinand->reg_proto = SPINAND_SINGLE_STR; > + /* > + * PoR Reset (if available by the manufacturer) is performed at the suspend > + * time. Hence, those flashes remain in power-on-state at this point, in a > + * standard SPI IO mode. So, now the core unanimously performs a soft reset. > + */ > ret = spinand_reset_op(spinand); > if (ret) > return; > @@ -1327,6 +1332,21 @@ static void spinand_mtd_resume(struct mtd_info *mtd) > spinand_ecc_enable(spinand, false); > } > > +static int spinand_mtd_suspend(struct mtd_info *mtd) > +{ > + struct spinand_device *spinand = mtd_to_spinand(mtd); > + int ret; > + > + if (!(spinand->flags & SPINAND_HAS_POR_CMD_BIT)) > + return 0; > + > + ret = spinand_power_on_rst_op(spinand); > + if (ret) > + dev_err(&spinand->spimem->spi->dev, "suspend() failed\n"); > + > + return ret; > +} I suspect you need to implement the spi_mem_driver.shutdown() method and do a PoR in that case too. If the device doesn't support the PoR command, we should at least switch back to the 1-1-1-STR mode manually. > + > static int spinand_init(struct spinand_device *spinand) > { > struct device *dev = &spinand->spimem->spi->dev; > @@ -1399,6 +1419,7 @@ static int spinand_init(struct spinand_device *spinand) > mtd->_erase = spinand_mtd_erase; > mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks; > mtd->_resume = spinand_mtd_resume; > + mtd->_suspend = spinand_mtd_suspend; > > if (nand->ecc.engine) { > ret = mtd_ooblayout_count_freebytes(mtd);
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@collabora.com> To: Apurva Nandan <a-nandan@ti.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Patrice Chotard <patrice.chotard@foss.st.com>, Christophe Kerello <christophe.kerello@foss.st.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <p.yadav@ti.com> Subject: Re: [PATCH v2 11/14] mtd: spinand: Perform Power-on-Reset on the flash in mtd_suspend() Date: Tue, 12 Oct 2021 09:25:08 +0200 [thread overview] Message-ID: <20211012092508.1647047b@collabora.com> (raw) In-Reply-To: <20211011204619.81893-12-a-nandan@ti.com> On Tue, 12 Oct 2021 02:16:16 +0530 Apurva Nandan <a-nandan@ti.com> wrote: > A soft reset using FFh command doesn't erase the flash's configuration > and doesn't reset the SPI IO mode also. This can result in the flash > being in a different SPI IO mode, e.g. Octal DTR, when resuming from > sleep. This could put the flash in an unrecognized SPI IO mode, making > it unusable. > > Perform a Power-on-Reset (PoR), if available in the flash, when > performing mtd_suspend(). This would set the flash to clean > state for reinitialization during resume and would also ensure that it > is in standard SPI IO mode (1S-1S-1S) before the resume begins. > > Signed-off-by: Apurva Nandan <a-nandan@ti.com> > --- > drivers/mtd/nand/spi/core.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c > index 9b570570ee81..60408531979a 100644 > --- a/drivers/mtd/nand/spi/core.c > +++ b/drivers/mtd/nand/spi/core.c > @@ -1316,6 +1316,11 @@ static void spinand_mtd_resume(struct mtd_info *mtd) > int ret; > > spinand->reg_proto = SPINAND_SINGLE_STR; > + /* > + * PoR Reset (if available by the manufacturer) is performed at the suspend > + * time. Hence, those flashes remain in power-on-state at this point, in a > + * standard SPI IO mode. So, now the core unanimously performs a soft reset. > + */ > ret = spinand_reset_op(spinand); > if (ret) > return; > @@ -1327,6 +1332,21 @@ static void spinand_mtd_resume(struct mtd_info *mtd) > spinand_ecc_enable(spinand, false); > } > > +static int spinand_mtd_suspend(struct mtd_info *mtd) > +{ > + struct spinand_device *spinand = mtd_to_spinand(mtd); > + int ret; > + > + if (!(spinand->flags & SPINAND_HAS_POR_CMD_BIT)) > + return 0; > + > + ret = spinand_power_on_rst_op(spinand); > + if (ret) > + dev_err(&spinand->spimem->spi->dev, "suspend() failed\n"); > + > + return ret; > +} I suspect you need to implement the spi_mem_driver.shutdown() method and do a PoR in that case too. If the device doesn't support the PoR command, we should at least switch back to the 1-1-1-STR mode manually. > + > static int spinand_init(struct spinand_device *spinand) > { > struct device *dev = &spinand->spimem->spi->dev; > @@ -1399,6 +1419,7 @@ static int spinand_init(struct spinand_device *spinand) > mtd->_erase = spinand_mtd_erase; > mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks; > mtd->_resume = spinand_mtd_resume; > + mtd->_suspend = spinand_mtd_suspend; > > if (nand->ecc.engine) { > ret = mtd_ooblayout_count_freebytes(mtd); ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2021-10-12 7:25 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-11 20:46 [PATCH v2 00/14] mtd: spinand: Add Octal DTR SPI (8D-8D-8D) mode support Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 01/14] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 02/14] mtd: spinand: Add enum spinand_proto to indicate current SPI IO mode Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-12 6:39 ` Boris Brezillon 2021-10-12 6:39 ` Boris Brezillon 2021-10-11 20:46 ` [PATCH v2 03/14] mtd: spinand: Patch spi_mem_op for the SPI IO protocol using reg_proto Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-12 6:40 ` Boris Brezillon 2021-10-12 6:40 ` Boris Brezillon 2021-10-11 20:46 ` [PATCH v2 04/14] mtd: spinand: Fix odd byte addr and data phase in read and write reg op for Octal DTR mode Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 05/14] mtd: spinand: Add adjust_op() in manufacturer_ops to modify the ops for manufacturer specific changes Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-12 6:54 ` Boris Brezillon 2021-10-12 6:54 ` Boris Brezillon 2021-10-11 20:46 ` [PATCH v2 06/14] mtd: spinand: Add macros for Octal DTR page read and write operations Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 07/14] mtd: spinand: Allow enabling Octal DTR mode in the core Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-12 7:14 ` Boris Brezillon 2021-10-12 7:14 ` Boris Brezillon 2021-10-11 20:46 ` [PATCH v2 08/14] mtd: spinand: winbond: Add support for write volatile configuration register op Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 09/14] mtd: spinand: winbond: Add octal_dtr_enable() for manufacturer_ops Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 10/14] mtd: spinand: Add support for Power-on-Reset (PoR) instruction Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 11/14] mtd: spinand: Perform Power-on-Reset on the flash in mtd_suspend() Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-12 7:25 ` Boris Brezillon [this message] 2021-10-12 7:25 ` Boris Brezillon 2021-10-11 20:46 ` [PATCH v2 12/14] mtd: spinand: Add adjust_op() in Winbond manufacturer_ops Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 13/14] mtd: spinand: winbond: Rename cache op_variants struct variable Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan 2021-10-11 20:46 ` [PATCH v2 14/14] mtd: spinand: winbond: Add support for Winbond W35N01JW SPI NAND flash Apurva Nandan 2021-10-11 20:46 ` Apurva Nandan
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