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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <bp@alien8.de>,
	<mchehab@kernel.org>, <tony.luck@intel.com>,
	<james.morse@arm.com>, <rric@kernel.org>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	<NaveenKrishna.Chatradhi@amd.com>, <Muralidhara.MK@amd.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v3 26/33] EDAC/amd64: Update CS ID calculation to match reference code
Date: Thu, 28 Oct 2021 17:57:21 +0000	[thread overview]
Message-ID: <20211028175728.121452-27-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20211028175728.121452-1-yazen.ghannam@amd.com>

Redo the current CS ID calculations to match the reference code. Helper
functions are introduced that will be expanded for future DF versions.

Use u16 type for dst_fabric_id and component_id_mask values to
accommodate larger bitfields in future DF versions.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20210623192002.3671647-28-yazen.ghannam@amd.com

v2->v3:
* Was patch 27 in v2.

v1->v2:
* Moved from arch/x86 to EDAC.
* Added functions to data_fabric_ops.

 drivers/edac/amd64_edac.c | 52 ++++++++++++++++++++++++++-------------
 1 file changed, 35 insertions(+), 17 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 9312784b2b0f..9c74813c4128 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1083,6 +1083,8 @@ struct addr_ctx {
 
 struct data_fabric_ops {
 	u64	(*get_hi_addr_offset)		(struct addr_ctx *ctx);
+	u16	(*get_dst_fabric_id)		(struct addr_ctx *ctx);
+	u16	(*get_component_id_mask)	(struct addr_ctx *ctx);
 	u8	(*get_die_id_shift)		(struct addr_ctx *ctx);
 	u8	(*get_socket_id_shift)		(struct addr_ctx *ctx);
 	int	(*get_intlv_mode)		(struct addr_ctx *ctx);
@@ -1204,6 +1206,16 @@ static u8 get_socket_id_shift_df2(struct addr_ctx *ctx)
 	return (ctx->reg_fab_id_mask0 >> 28) & 0xF;
 }
 
+static u16 get_dst_fabric_id_df2(struct addr_ctx *ctx)
+{
+	return ctx->reg_limit_addr & 0xFF;
+}
+
+static u16 get_component_id_mask_df2(struct addr_ctx *ctx)
+{
+	return (~(ctx->socket_id_mask | ctx->die_id_mask)) & 0xFF;
+}
+
 struct data_fabric_ops df2_ops = {
 	.get_hi_addr_offset		=	get_hi_addr_offset_df2,
 	.get_intlv_mode			=	get_intlv_mode_df2,
@@ -1213,6 +1225,8 @@ struct data_fabric_ops df2_ops = {
 	.get_masks			=	get_masks_df2,
 	.get_die_id_shift		=	get_die_id_shift_df2,
 	.get_socket_id_shift		=	get_socket_id_shift_df2,
+	.get_dst_fabric_id		=	get_dst_fabric_id_df2,
+	.get_component_id_mask		=	get_component_id_mask_df2,
 };
 
 struct data_fabric_ops *df_ops;
@@ -1299,38 +1313,42 @@ static void get_intlv_num_chan(struct addr_ctx *ctx)
 	}
 }
 
-static int calculate_cs_id(struct addr_ctx *ctx)
+static u8 calc_level_bits(u8 id, u8 level_mask, u8 shift, u8 mask, u8 num_bits)
 {
-	u8 die_id_bit = 0, sock_id_bit, cs_mask = 0;
+	return (((id & level_mask) >> shift) & mask) << num_bits;
+}
 
-	/* If interleaved over more than 1 channel: */
-	if (ctx->intlv_num_chan) {
-		die_id_bit = ctx->intlv_num_chan;
-		cs_mask	   = (1 << die_id_bit) - 1;
-		ctx->cs_id = ctx->cs_fabric_id & cs_mask;
-	}
+static int calculate_cs_id(struct addr_ctx *ctx)
+{
+	u16 dst_fabric_id = df_ops->get_dst_fabric_id(ctx);
+	u16 mask, num_intlv_bits = ctx->intlv_num_chan;
 
-	/* Return early if no die interleaving and no socket interleaving. */
-	if (!(ctx->intlv_num_dies || ctx->intlv_num_sockets))
-		return 0;
+	mask = df_ops->get_component_id_mask(ctx);
+	ctx->cs_id = (ctx->cs_fabric_id & mask) - (dst_fabric_id & mask);
 
-	sock_id_bit = die_id_bit;
+	mask = (1 << num_intlv_bits) - 1;
+	ctx->cs_id &= mask;
 
 	/* If interleaved over more than 1 die: */
 	if (ctx->intlv_num_dies) {
 		u8 die_id_shift = df_ops->get_die_id_shift(ctx);
 
-		sock_id_bit  = die_id_bit + ctx->intlv_num_dies;
-		ctx->cs_id |= ((ctx->cs_fabric_id & ctx->die_id_mask)
-				>> die_id_shift) << die_id_bit;
+		mask = (1 << ctx->intlv_num_dies) - 1;
+
+		ctx->cs_id |= calc_level_bits(ctx->cs_fabric_id, ctx->die_id_mask,
+					      die_id_shift, mask, num_intlv_bits);
+
+		num_intlv_bits += ctx->intlv_num_dies;
 	}
 
 	/* If interleaved over more than 1 socket: */
 	if (ctx->intlv_num_sockets) {
 		u8 socket_id_shift = df_ops->get_socket_id_shift(ctx);
 
-		ctx->cs_id |= ((ctx->cs_fabric_id & ctx->socket_id_mask)
-				>> socket_id_shift) << sock_id_bit;
+		mask = (1 << ctx->intlv_num_sockets) - 1;
+
+		ctx->cs_id |= calc_level_bits(ctx->cs_fabric_id, ctx->socket_id_mask,
+					      socket_id_shift, mask, num_intlv_bits);
 	}
 
 	return 0;
-- 
2.25.1


  parent reply	other threads:[~2021-10-28 17:59 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-28 17:56 [PATCH v3 00/33] AMD MCA Address Translation Updates Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 01/33] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 02/33] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 03/33] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 04/33] EDAC/amd64: Add context struct Yazen Ghannam
2021-11-15 16:17   ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 05/33] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 06/33] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 07/33] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 08/33] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 09/33] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 10/33] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 11/33] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 12/33] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 13/33] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 14/33] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 15/33] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 16/33] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 17/33] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 18/33] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 19/33] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 20/33] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 21/33] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 22/33] EDAC/amd64: Define function to calculate " Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 23/33] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 24/33] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 25/33] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-10-28 17:57 ` Yazen Ghannam [this message]
2021-10-28 17:57 ` [PATCH v3 27/33] EDAC/amd64: Match hash function to reference code Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 28/33] EDAC/amd64: Define function to get interleave address select bit Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 29/33] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 30/33] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 31/33] EDAC/amd64: Add check for when to add DRAM base and hole Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 32/33] EDAC/amd64: Save the number of block instances Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 33/33] EDAC/amd64: Add address translation support for DF3.5 Yazen Ghannam

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