From: Nishanth Menon <nm@ti.com> To: Rob Herring <robh+dt@kernel.org>, Tero Kristo <kristo@kernel.org>, Vignesh Raghavendra <vigneshr@ti.com> Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Nishanth Menon <nm@ti.com>, <linux-omap@vger.kernel.org>, Peng Fan <peng.fan@nxp.com> Subject: [PATCH V2] arm64: dts: ti: k3-j7200: Correct the d-cache-sets info Date: Fri, 12 Nov 2021 22:26:40 -0600 [thread overview] Message-ID: <20211113042640.30955-1-nm@ti.com> (raw) A72 Cluster (chapter 1.3.1 [1]) has 48KB Icache, 32KB Dcache and 1MB L2 Cache - ICache is 3-way set-associative - Dcache is 2-way set-associative - Line size are 64bytes 32KB (Dcache)/64 (fixed line length of 64 bytes) = 512 ways 512 ways / 2 (Dcache is 2-way per set) = 256 sets. So, correct the d-cache-sets info. [1] https://www.ti.com/lit/pdf/spruiu1 Fixes: d361ed88455f ("arm64: dts: ti: Add support for J7200 SoC") Reported-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Nishanth Menon <nm@ti.com> --- Changes since V1: * subject line fixup to stay in sync with other patches * type in chapter (',' replaced with '.') V1: https://lore.kernel.org/linux-arm-kernel/20211113024348.29257-1-nm@ti.com/T/#u arch/arm64/boot/dts/ti/k3-j7200.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index 47567cb260c2..958587d3a33d 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -62,7 +62,7 @@ cpu0: cpu@0 { i-cache-sets = <256>; d-cache-size = <0x8000>; d-cache-line-size = <64>; - d-cache-sets = <128>; + d-cache-sets = <256>; next-level-cache = <&L2_0>; }; @@ -76,7 +76,7 @@ cpu1: cpu@1 { i-cache-sets = <256>; d-cache-size = <0x8000>; d-cache-line-size = <64>; - d-cache-sets = <128>; + d-cache-sets = <256>; next-level-cache = <&L2_0>; }; }; -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Nishanth Menon <nm@ti.com> To: Rob Herring <robh+dt@kernel.org>, Tero Kristo <kristo@kernel.org>, Vignesh Raghavendra <vigneshr@ti.com> Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Nishanth Menon <nm@ti.com>, <linux-omap@vger.kernel.org>, Peng Fan <peng.fan@nxp.com> Subject: [PATCH V2] arm64: dts: ti: k3-j7200: Correct the d-cache-sets info Date: Fri, 12 Nov 2021 22:26:40 -0600 [thread overview] Message-ID: <20211113042640.30955-1-nm@ti.com> (raw) A72 Cluster (chapter 1.3.1 [1]) has 48KB Icache, 32KB Dcache and 1MB L2 Cache - ICache is 3-way set-associative - Dcache is 2-way set-associative - Line size are 64bytes 32KB (Dcache)/64 (fixed line length of 64 bytes) = 512 ways 512 ways / 2 (Dcache is 2-way per set) = 256 sets. So, correct the d-cache-sets info. [1] https://www.ti.com/lit/pdf/spruiu1 Fixes: d361ed88455f ("arm64: dts: ti: Add support for J7200 SoC") Reported-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Nishanth Menon <nm@ti.com> --- Changes since V1: * subject line fixup to stay in sync with other patches * type in chapter (',' replaced with '.') V1: https://lore.kernel.org/linux-arm-kernel/20211113024348.29257-1-nm@ti.com/T/#u arch/arm64/boot/dts/ti/k3-j7200.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index 47567cb260c2..958587d3a33d 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -62,7 +62,7 @@ cpu0: cpu@0 { i-cache-sets = <256>; d-cache-size = <0x8000>; d-cache-line-size = <64>; - d-cache-sets = <128>; + d-cache-sets = <256>; next-level-cache = <&L2_0>; }; @@ -76,7 +76,7 @@ cpu1: cpu@1 { i-cache-sets = <256>; d-cache-size = <0x8000>; d-cache-line-size = <64>; - d-cache-sets = <128>; + d-cache-sets = <256>; next-level-cache = <&L2_0>; }; }; -- 2.32.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2021-11-13 4:26 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-11-13 4:26 Nishanth Menon [this message] 2021-11-13 4:26 ` [PATCH V2] arm64: dts: ti: k3-j7200: Correct the d-cache-sets info Nishanth Menon 2021-12-03 11:46 ` Pratyush Yadav 2021-12-03 11:46 ` Pratyush Yadav 2021-12-06 13:13 ` Vignesh Raghavendra 2021-12-06 13:13 ` Vignesh Raghavendra
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