From: Marc Zyngier <maz@kernel.org> To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com>, Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>, Sven Peter <sven@svenpeter.dev>, Alyssa Rosenzweig <alyssa@rosenzweig.io>, Rob Herring <robh+dt@kernel.org>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH 4/8] irqchip/apple-aic: Wire PMU interrupts Date: Sat, 13 Nov 2021 11:54:25 +0000 [thread overview] Message-ID: <20211113115429.4027571-5-maz@kernel.org> (raw) In-Reply-To: <20211113115429.4027571-1-maz@kernel.org> Add the necessary code to configure and P and E-core PMU interrupts with their respective affinities. When such an interrupt fires, map it onto the right pseudo-interrupt. Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-apple-aic.c | 34 +++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c index 30ca80ccda8b..23f5f10e974e 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -155,7 +155,7 @@ #define SYS_IMP_APL_UPMSR_EL1 sys_reg(3, 7, 15, 6, 4) #define UPMSR_IACT BIT(0) -#define AIC_NR_FIQ 4 +#define AIC_NR_FIQ 6 #define AIC_NR_SWIPI 32 /* @@ -207,6 +207,11 @@ static bool __is_pcore(u64 mpidr) return MPIDR_AFFINITY_LEVEL(mpidr, 2) == 1; } +static bool is_pcore(void) +{ + return __is_pcore(read_cpuid_mpidr()); +} + /* * IRQ irqchip */ @@ -420,16 +425,10 @@ static void __exception_irq_entry aic_handle_fiq(struct pt_regs *regs) aic_irqc->nr_hw + AIC_TMR_EL02_VIRT); } - if ((read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & (PMCR0_IMODE | PMCR0_IACT)) == - (FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_FIQ) | PMCR0_IACT)) { - /* - * Not supported yet, let's figure out how to handle this when - * we implement these proprietary performance counters. For now, - * just mask it and move on. - */ - pr_err_ratelimited("PMC FIQ fired. Masking.\n"); - sysreg_clear_set_s(SYS_IMP_APL_PMCR0_EL1, PMCR0_IMODE | PMCR0_IACT, - FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_OFF)); + if (read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & PMCR0_IACT) { + int irq = is_pcore() ? AIC_CPU_PMU_P : AIC_CPU_PMU_E; + generic_handle_domain_irq(aic_irqc->hw_domain, + aic_irqc->nr_hw + irq); } if (FIELD_GET(UPMCR0_IMODE, read_sysreg_s(SYS_IMP_APL_UPMCR0_EL1)) == UPMCR0_IMODE_FIQ && @@ -469,7 +468,18 @@ static int aic_irq_domain_map(struct irq_domain *id, unsigned int irq, handle_fasteoi_irq, NULL, NULL); irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq))); } else { - irq_set_percpu_devid(irq); + switch (hw - ic->nr_hw) { + case AIC_CPU_PMU_P: + irq_set_percpu_devid_partition(irq, &ic->pcore_mask); + break; + case AIC_CPU_PMU_E: + irq_set_percpu_devid_partition(irq, &ic->ecore_mask); + break; + default: + irq_set_percpu_devid(irq); + break; + } + irq_domain_set_info(id, irq, hw, &fiq_chip, id->host_data, handle_percpu_devid_irq, NULL, NULL); } -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org> To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com>, Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>, Sven Peter <sven@svenpeter.dev>, Alyssa Rosenzweig <alyssa@rosenzweig.io>, Rob Herring <robh+dt@kernel.org>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH 4/8] irqchip/apple-aic: Wire PMU interrupts Date: Sat, 13 Nov 2021 11:54:25 +0000 [thread overview] Message-ID: <20211113115429.4027571-5-maz@kernel.org> (raw) In-Reply-To: <20211113115429.4027571-1-maz@kernel.org> Add the necessary code to configure and P and E-core PMU interrupts with their respective affinities. When such an interrupt fires, map it onto the right pseudo-interrupt. Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-apple-aic.c | 34 +++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c index 30ca80ccda8b..23f5f10e974e 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -155,7 +155,7 @@ #define SYS_IMP_APL_UPMSR_EL1 sys_reg(3, 7, 15, 6, 4) #define UPMSR_IACT BIT(0) -#define AIC_NR_FIQ 4 +#define AIC_NR_FIQ 6 #define AIC_NR_SWIPI 32 /* @@ -207,6 +207,11 @@ static bool __is_pcore(u64 mpidr) return MPIDR_AFFINITY_LEVEL(mpidr, 2) == 1; } +static bool is_pcore(void) +{ + return __is_pcore(read_cpuid_mpidr()); +} + /* * IRQ irqchip */ @@ -420,16 +425,10 @@ static void __exception_irq_entry aic_handle_fiq(struct pt_regs *regs) aic_irqc->nr_hw + AIC_TMR_EL02_VIRT); } - if ((read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & (PMCR0_IMODE | PMCR0_IACT)) == - (FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_FIQ) | PMCR0_IACT)) { - /* - * Not supported yet, let's figure out how to handle this when - * we implement these proprietary performance counters. For now, - * just mask it and move on. - */ - pr_err_ratelimited("PMC FIQ fired. Masking.\n"); - sysreg_clear_set_s(SYS_IMP_APL_PMCR0_EL1, PMCR0_IMODE | PMCR0_IACT, - FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_OFF)); + if (read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & PMCR0_IACT) { + int irq = is_pcore() ? AIC_CPU_PMU_P : AIC_CPU_PMU_E; + generic_handle_domain_irq(aic_irqc->hw_domain, + aic_irqc->nr_hw + irq); } if (FIELD_GET(UPMCR0_IMODE, read_sysreg_s(SYS_IMP_APL_UPMCR0_EL1)) == UPMCR0_IMODE_FIQ && @@ -469,7 +468,18 @@ static int aic_irq_domain_map(struct irq_domain *id, unsigned int irq, handle_fasteoi_irq, NULL, NULL); irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq))); } else { - irq_set_percpu_devid(irq); + switch (hw - ic->nr_hw) { + case AIC_CPU_PMU_P: + irq_set_percpu_devid_partition(irq, &ic->pcore_mask); + break; + case AIC_CPU_PMU_E: + irq_set_percpu_devid_partition(irq, &ic->ecore_mask); + break; + default: + irq_set_percpu_devid(irq); + break; + } + irq_domain_set_info(id, irq, hw, &fiq_chip, id->host_data, handle_percpu_devid_irq, NULL, NULL); } -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-11-13 11:54 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-11-13 11:54 [PATCH 0/8] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-13 11:54 ` [PATCH 1/8] dt-bindings: arm-pmu: Document Apple PMU compatible strings Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-29 21:24 ` Rob Herring 2021-11-29 21:24 ` Rob Herring 2021-11-13 11:54 ` [PATCH 2/8] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts Marc Zyngier 2021-11-13 11:54 ` [PATCH 2/8] dt-bindings: apple, aic: " Marc Zyngier 2021-11-29 21:25 ` [PATCH 2/8] dt-bindings: apple,aic: " Rob Herring 2021-11-29 21:25 ` Rob Herring 2021-11-13 11:54 ` [PATCH 3/8] irqchip/apple-aic: Add cpumasks for E and P cores Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier [this message] 2021-11-13 11:54 ` [PATCH 4/8] irqchip/apple-aic: Wire PMU interrupts Marc Zyngier 2021-11-13 11:54 ` [PATCH 5/8] irqchip/apple-aic: Move PMU-specific registers to their own include file Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-13 11:54 ` [PATCH 6/8] arm64: apple: t8301: Add PMU nodes Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-13 11:54 ` [PATCH 7/8] drivers/perf: arm_pmu: Handle 47 bit counters Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-13 11:54 ` [PATCH 8/8] drivers/perf: Add Apple icestorm/firestorm CPU PMU driver Marc Zyngier 2021-11-13 11:54 ` Marc Zyngier 2021-11-13 13:04 ` Alyssa Rosenzweig 2021-11-13 13:04 ` Alyssa Rosenzweig 2021-11-14 2:43 ` Dougall 2021-11-14 2:43 ` Dougall 2021-11-15 10:51 ` Marc Zyngier 2021-11-15 10:51 ` Marc Zyngier 2021-11-14 13:45 ` Alyssa Rosenzweig 2021-11-14 13:45 ` Alyssa Rosenzweig 2021-11-14 18:35 ` Marc Zyngier 2021-11-14 18:35 ` Marc Zyngier
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