From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Björn Töpel" <bjorn@kernel.org>,
"Alexei Starovoitov" <ast@kernel.org>,
"Daniel Borkmann" <daniel@iogearbox.net>,
"Andrii Nakryiko" <andrii@kernel.org>,
"Martin KaFai Lau" <kafai@fb.com>,
"Song Liu" <songliubraving@fb.com>, "Yonghong Song" <yhs@fb.com>,
"John Fastabend" <john.fastabend@gmail.com>,
"KP Singh" <kpsingh@kernel.org>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Michal Marek" <michal.lkml@markovi.net>,
"Nick Desaulniers" <ndesaulniers@google.com>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>,
Tong Tiangen <tongtiangen@huawei.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, bpf@vger.kernel.org,
linux-kbuild@vger.kernel.org
Subject: [PATCH 08/12] riscv: extable: consolidate definitions
Date: Thu, 18 Nov 2021 19:25:45 +0800 [thread overview]
Message-ID: <20211118192545.349f59b7@xhacker> (raw)
In-Reply-To: <20211118192130.48b8f04c@xhacker>
From: Jisheng Zhang <jszhang@kernel.org>
This is a riscv port of commit 819771cc2892 ("arm64: extable:
consolidate definitions").
In subsequent patches we'll alter the structure and usage of struct
exception_table_entry.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/include/asm/asm-extable.h | 33 ++++++++++++++++++++++++++++
arch/riscv/include/asm/futex.h | 1 +
arch/riscv/include/asm/uaccess.h | 7 +-----
arch/riscv/lib/uaccess.S | 6 ++---
4 files changed, 37 insertions(+), 10 deletions(-)
create mode 100644 arch/riscv/include/asm/asm-extable.h
diff --git a/arch/riscv/include/asm/asm-extable.h b/arch/riscv/include/asm/asm-extable.h
new file mode 100644
index 000000000000..b790c02dbdda
--- /dev/null
+++ b/arch/riscv/include/asm/asm-extable.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_ASM_EXTABLE_H
+#define __ASM_ASM_EXTABLE_H
+
+#ifdef __ASSEMBLY__
+
+#define __ASM_EXTABLE_RAW(insn, fixup) \
+ .pushsection __ex_table, "a"; \
+ .balign 4; \
+ .long ((insn) - .); \
+ .long ((fixup) - .); \
+ .popsection;
+
+ .macro _asm_extable, insn, fixup
+ __ASM_EXTABLE_RAW(\insn, \fixup)
+ .endm
+
+#else /* __ASSEMBLY__ */
+
+#include <linux/stringify.h>
+
+#define __ASM_EXTABLE_RAW(insn, fixup) \
+ ".pushsection __ex_table, \"a\"\n" \
+ ".balign 4\n" \
+ ".long ((" insn ") - .)\n" \
+ ".long ((" fixup ") - .)\n" \
+ ".popsection\n"
+
+#define _ASM_EXTABLE(insn, fixup) __ASM_EXTABLE_RAW(#insn, #fixup)
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ASM_EXTABLE_H */
diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
index 3191574e135c..2e15e8e89502 100644
--- a/arch/riscv/include/asm/futex.h
+++ b/arch/riscv/include/asm/futex.h
@@ -11,6 +11,7 @@
#include <linux/uaccess.h>
#include <linux/errno.h>
#include <asm/asm.h>
+#include <asm/asm-extable.h>
/* We don't even really need the extable code, but for now keep it simple */
#ifndef CONFIG_MMU
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index 0f2c5b9d2e8f..40e6099af488 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -8,14 +8,9 @@
#ifndef _ASM_RISCV_UACCESS_H
#define _ASM_RISCV_UACCESS_H
+#include <asm/asm-extable.h>
#include <asm/pgtable.h> /* for TASK_SIZE */
-#define _ASM_EXTABLE(from, to) \
- " .pushsection __ex_table, \"a\"\n" \
- " .balign 4\n" \
- " .long (" #from " - .), (" #to " - .)\n" \
- " .popsection\n"
-
/*
* User space memory access functions
*/
diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index 047f517ac780..8c475f4da308 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -1,15 +1,13 @@
#include <linux/linkage.h>
#include <asm-generic/export.h>
#include <asm/asm.h>
+#include <asm/asm-extable.h>
#include <asm/csr.h>
.macro fixup op reg addr lbl
100:
\op \reg, \addr
- .section __ex_table,"a"
- .balign 4
- .long (100b - .), (\lbl - .)
- .previous
+ _asm_extable 100b, \lbl
.endm
ENTRY(__asm_copy_to_user)
--
2.33.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Björn Töpel" <bjorn@kernel.org>,
"Alexei Starovoitov" <ast@kernel.org>,
"Daniel Borkmann" <daniel@iogearbox.net>,
"Andrii Nakryiko" <andrii@kernel.org>,
"Martin KaFai Lau" <kafai@fb.com>,
"Song Liu" <songliubraving@fb.com>, "Yonghong Song" <yhs@fb.com>,
"John Fastabend" <john.fastabend@gmail.com>,
"KP Singh" <kpsingh@kernel.org>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Michal Marek" <michal.lkml@markovi.net>,
"Nick Desaulniers" <ndesaulniers@google.com>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>,
Tong Tiangen <tongtiangen@huawei.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, bpf@vger.kernel.org,
linux-kbuild@vger.kernel.org
Subject: [PATCH 08/12] riscv: extable: consolidate definitions
Date: Thu, 18 Nov 2021 19:25:45 +0800 [thread overview]
Message-ID: <20211118192545.349f59b7@xhacker> (raw)
In-Reply-To: <20211118192130.48b8f04c@xhacker>
From: Jisheng Zhang <jszhang@kernel.org>
This is a riscv port of commit 819771cc2892 ("arm64: extable:
consolidate definitions").
In subsequent patches we'll alter the structure and usage of struct
exception_table_entry.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/include/asm/asm-extable.h | 33 ++++++++++++++++++++++++++++
arch/riscv/include/asm/futex.h | 1 +
arch/riscv/include/asm/uaccess.h | 7 +-----
arch/riscv/lib/uaccess.S | 6 ++---
4 files changed, 37 insertions(+), 10 deletions(-)
create mode 100644 arch/riscv/include/asm/asm-extable.h
diff --git a/arch/riscv/include/asm/asm-extable.h b/arch/riscv/include/asm/asm-extable.h
new file mode 100644
index 000000000000..b790c02dbdda
--- /dev/null
+++ b/arch/riscv/include/asm/asm-extable.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_ASM_EXTABLE_H
+#define __ASM_ASM_EXTABLE_H
+
+#ifdef __ASSEMBLY__
+
+#define __ASM_EXTABLE_RAW(insn, fixup) \
+ .pushsection __ex_table, "a"; \
+ .balign 4; \
+ .long ((insn) - .); \
+ .long ((fixup) - .); \
+ .popsection;
+
+ .macro _asm_extable, insn, fixup
+ __ASM_EXTABLE_RAW(\insn, \fixup)
+ .endm
+
+#else /* __ASSEMBLY__ */
+
+#include <linux/stringify.h>
+
+#define __ASM_EXTABLE_RAW(insn, fixup) \
+ ".pushsection __ex_table, \"a\"\n" \
+ ".balign 4\n" \
+ ".long ((" insn ") - .)\n" \
+ ".long ((" fixup ") - .)\n" \
+ ".popsection\n"
+
+#define _ASM_EXTABLE(insn, fixup) __ASM_EXTABLE_RAW(#insn, #fixup)
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ASM_EXTABLE_H */
diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
index 3191574e135c..2e15e8e89502 100644
--- a/arch/riscv/include/asm/futex.h
+++ b/arch/riscv/include/asm/futex.h
@@ -11,6 +11,7 @@
#include <linux/uaccess.h>
#include <linux/errno.h>
#include <asm/asm.h>
+#include <asm/asm-extable.h>
/* We don't even really need the extable code, but for now keep it simple */
#ifndef CONFIG_MMU
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index 0f2c5b9d2e8f..40e6099af488 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -8,14 +8,9 @@
#ifndef _ASM_RISCV_UACCESS_H
#define _ASM_RISCV_UACCESS_H
+#include <asm/asm-extable.h>
#include <asm/pgtable.h> /* for TASK_SIZE */
-#define _ASM_EXTABLE(from, to) \
- " .pushsection __ex_table, \"a\"\n" \
- " .balign 4\n" \
- " .long (" #from " - .), (" #to " - .)\n" \
- " .popsection\n"
-
/*
* User space memory access functions
*/
diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index 047f517ac780..8c475f4da308 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -1,15 +1,13 @@
#include <linux/linkage.h>
#include <asm-generic/export.h>
#include <asm/asm.h>
+#include <asm/asm-extable.h>
#include <asm/csr.h>
.macro fixup op reg addr lbl
100:
\op \reg, \addr
- .section __ex_table,"a"
- .balign 4
- .long (100b - .), (\lbl - .)
- .previous
+ _asm_extable 100b, \lbl
.endm
ENTRY(__asm_copy_to_user)
--
2.33.0
next prev parent reply other threads:[~2021-11-18 11:35 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-18 11:21 [PATCH v4 0/12] riscv: switch to relative extable and other improvements Jisheng Zhang
2021-11-18 11:21 ` Jisheng Zhang
2021-11-18 11:22 ` [PATCH 01/12] riscv: remove unused __cmpxchg_user() macro Jisheng Zhang
2021-11-18 11:22 ` Jisheng Zhang
2021-11-18 11:22 ` [PATCH 02/12] riscv: consolidate __ex_table construction Jisheng Zhang
2021-11-18 11:22 ` Jisheng Zhang
2021-11-18 11:22 ` [PATCH 03/12] riscv: switch to relative exception tables Jisheng Zhang
2021-11-18 11:22 ` Jisheng Zhang
2021-11-19 2:09 ` tongtiangen
2021-11-19 2:09 ` tongtiangen
2021-11-18 11:23 ` [PATCH 04/12] riscv: bpf: move rv_bpf_fixup_exception signature to extable.h Jisheng Zhang
2021-11-18 11:23 ` Jisheng Zhang
2021-11-18 11:24 ` [PATCH 05/12] riscv: extable: make fixup_exception() return bool Jisheng Zhang
2021-11-18 11:24 ` Jisheng Zhang
2021-11-18 11:24 ` [PATCH 06/12] riscv: extable: use `ex` for `exception_table_entry` Jisheng Zhang
2021-11-18 11:24 ` Jisheng Zhang
2021-11-18 11:25 ` [PATCH 07/12] riscv: lib: uaccess: fold fixups into body Jisheng Zhang
2021-11-18 11:25 ` Jisheng Zhang
2021-11-18 11:25 ` Jisheng Zhang [this message]
2021-11-18 11:25 ` [PATCH 08/12] riscv: extable: consolidate definitions Jisheng Zhang
2021-11-18 11:26 ` [PATCH 09/12] riscv: extable: add `type` and `data` fields Jisheng Zhang
2021-11-18 11:26 ` Jisheng Zhang
2021-11-18 11:42 ` Jisheng Zhang
2021-11-18 11:42 ` Jisheng Zhang
2021-11-18 15:21 ` Mark Rutland
2021-11-18 15:21 ` Mark Rutland
2022-01-06 3:21 ` Palmer Dabbelt
2022-01-06 3:21 ` Palmer Dabbelt
2022-01-06 10:23 ` Mark Rutland
2022-01-06 10:23 ` Mark Rutland
2021-11-19 2:35 ` tongtiangen
2021-11-19 2:35 ` tongtiangen
2021-11-18 11:26 ` [PATCH 10/12] riscv: add gpr-num.h Jisheng Zhang
2021-11-18 11:26 ` Jisheng Zhang
2021-11-18 11:26 ` [PATCH 11/12] riscv: extable: add a dedicated uaccess handler Jisheng Zhang
2021-11-18 11:26 ` Jisheng Zhang
2021-11-18 17:31 ` kernel test robot
2022-01-20 18:15 ` Mayuresh Chitale
2022-01-20 18:15 ` Mayuresh Chitale
2022-01-21 12:16 ` Jisheng Zhang
2022-01-21 12:16 ` Jisheng Zhang
2022-01-23 9:12 ` Jisheng Zhang
2022-01-23 9:12 ` Jisheng Zhang
2022-01-24 17:02 ` Mayuresh Chitale
2022-01-24 17:02 ` Mayuresh Chitale
2021-11-18 11:27 ` [PATCH 12/12] riscv: vmlinux.lds.S|vmlinux-xip.lds.S: remove `.fixup` section Jisheng Zhang
2021-11-18 11:27 ` Jisheng Zhang
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