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From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
To: Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 0/3] RK356x/Quartz64 Model A SPI
Date: Fri, 26 Nov 2021 16:43:41 +0100	[thread overview]
Message-ID: <20211126154344.724316-1-frattaroli.nicolas@gmail.com> (raw)

The first patch of this series adds a compatible for rk3568-spi
to the DT bindings.

The second adds the SPI nodes for RK3566 and RK3568 SoCs. The nodes
were lifted from the downstream vendor kernel's devicetree, and were
double-checked for correctness.

The third patch sets up the broken-out SPI pins on the Quartz64
Model A; they use the "m1" set of the pins, not the "m0" set. I
assume the "m" stands for "mux".

I've tested both patches by connecting an MCP2515 SPI CAN bus
controller to the spi pins, which initialised fine.

Regards,
Nicolas Frattaroli

Nicolas Frattaroli (3):
  dt-bindings: spi: spi-rockchip: Add rk3568-spi compatible
  arm64: dts: rockchip: Add spi nodes on rk356x
  arm64: dts: rockchip: Add spi1 pins on Quartz64 A

 .../devicetree/bindings/spi/spi-rockchip.yaml |  1 +
 .../boot/dts/rockchip/rk3566-quartz64-a.dts   |  5 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      | 68 +++++++++++++++++++
 3 files changed, 74 insertions(+)

-- 
2.34.0


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
To: Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 0/3] RK356x/Quartz64 Model A SPI
Date: Fri, 26 Nov 2021 16:43:41 +0100	[thread overview]
Message-ID: <20211126154344.724316-1-frattaroli.nicolas@gmail.com> (raw)

The first patch of this series adds a compatible for rk3568-spi
to the DT bindings.

The second adds the SPI nodes for RK3566 and RK3568 SoCs. The nodes
were lifted from the downstream vendor kernel's devicetree, and were
double-checked for correctness.

The third patch sets up the broken-out SPI pins on the Quartz64
Model A; they use the "m1" set of the pins, not the "m0" set. I
assume the "m" stands for "mux".

I've tested both patches by connecting an MCP2515 SPI CAN bus
controller to the spi pins, which initialised fine.

Regards,
Nicolas Frattaroli

Nicolas Frattaroli (3):
  dt-bindings: spi: spi-rockchip: Add rk3568-spi compatible
  arm64: dts: rockchip: Add spi nodes on rk356x
  arm64: dts: rockchip: Add spi1 pins on Quartz64 A

 .../devicetree/bindings/spi/spi-rockchip.yaml |  1 +
 .../boot/dts/rockchip/rk3566-quartz64-a.dts   |  5 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      | 68 +++++++++++++++++++
 3 files changed, 74 insertions(+)

-- 
2.34.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
To: Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>
Cc: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 0/3] RK356x/Quartz64 Model A SPI
Date: Fri, 26 Nov 2021 16:43:41 +0100	[thread overview]
Message-ID: <20211126154344.724316-1-frattaroli.nicolas@gmail.com> (raw)

The first patch of this series adds a compatible for rk3568-spi
to the DT bindings.

The second adds the SPI nodes for RK3566 and RK3568 SoCs. The nodes
were lifted from the downstream vendor kernel's devicetree, and were
double-checked for correctness.

The third patch sets up the broken-out SPI pins on the Quartz64
Model A; they use the "m1" set of the pins, not the "m0" set. I
assume the "m" stands for "mux".

I've tested both patches by connecting an MCP2515 SPI CAN bus
controller to the spi pins, which initialised fine.

Regards,
Nicolas Frattaroli

Nicolas Frattaroli (3):
  dt-bindings: spi: spi-rockchip: Add rk3568-spi compatible
  arm64: dts: rockchip: Add spi nodes on rk356x
  arm64: dts: rockchip: Add spi1 pins on Quartz64 A

 .../devicetree/bindings/spi/spi-rockchip.yaml |  1 +
 .../boot/dts/rockchip/rk3566-quartz64-a.dts   |  5 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      | 68 +++++++++++++++++++
 3 files changed, 74 insertions(+)

-- 
2.34.0


             reply	other threads:[~2021-11-26 15:44 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-26 15:43 Nicolas Frattaroli [this message]
2021-11-26 15:43 ` [PATCH 0/3] RK356x/Quartz64 Model A SPI Nicolas Frattaroli
2021-11-26 15:43 ` Nicolas Frattaroli
2021-11-26 15:43 ` [PATCH 1/3] dt-bindings: spi: spi-rockchip: Add rk3568-spi compatible Nicolas Frattaroli
2021-11-26 15:43   ` Nicolas Frattaroli
2021-11-26 15:43   ` Nicolas Frattaroli
2021-11-26 15:43 ` [PATCH 2/3] arm64: dts: rockchip: Add spi nodes on rk356x Nicolas Frattaroli
2021-11-26 15:43   ` Nicolas Frattaroli
2021-11-26 15:43   ` Nicolas Frattaroli
2021-11-26 17:51   ` Johan Jonker
2021-11-26 17:51     ` Johan Jonker
2021-11-26 17:51     ` Johan Jonker
2021-11-26 18:59     ` Heiko Stübner
2021-11-26 18:59       ` Heiko Stübner
2021-11-26 18:59       ` Heiko Stübner
2021-11-26 15:43 ` [PATCH 3/3] arm64: dts: rockchip: Add spi1 pins on Quartz64 A Nicolas Frattaroli
2021-11-26 15:43   ` Nicolas Frattaroli
2021-11-26 15:43   ` Nicolas Frattaroli
2021-11-29 16:45 ` (subset) [PATCH 0/3] RK356x/Quartz64 Model A SPI Mark Brown
2021-11-29 16:45   ` Mark Brown
2021-11-29 16:45   ` Mark Brown
2022-01-25 10:20 ` Mark Brown
2022-01-25 10:20   ` Mark Brown
2022-01-25 10:20   ` Mark Brown

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