From: Pierre Morel <pmorel@linux.ibm.com> To: qemu-s390x@nongnu.org Cc: qemu-devel@nongnu.org, borntraeger@de.ibm.com, pasic@linux.ibm.com, richard.henderson@linaro.org, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, mst@redhat.com, pbonzini@redhat.com, kvm@vger.kernel.org, ehabkost@redhat.com, marcel.apfelbaum@gmail.com, philmd@redhat.com, eblake@redhat.com, armbru@redhat.com Subject: [PATCH v5 04/12] s390x: topology: implementating Store Topology System Information Date: Thu, 9 Dec 2021 14:46:35 +0100 [thread overview] Message-ID: <20211209134643.143866-5-pmorel@linux.ibm.com> (raw) In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> The handling of STSI is enhanced with the interception of the function code 15 for storing CPU topology. Using the objects built during the pluging of CPU, we build the SYSIB 15_1_x structures. With this patch the maximum MNEST level is 2, this is also the only level allowed and only SYSIB 15_1_2 will be built. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> --- hw/s390x/cpu-topology.c | 12 ++-- target/s390x/cpu.h | 1 + target/s390x/cpu_topology.c | 112 ++++++++++++++++++++++++++++++++++++ target/s390x/kvm/kvm.c | 5 ++ target/s390x/meson.build | 1 + 5 files changed, 124 insertions(+), 7 deletions(-) create mode 100644 target/s390x/cpu_topology.c diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c index b7131b4ac3..74e04fd68e 100644 --- a/hw/s390x/cpu-topology.c +++ b/hw/s390x/cpu-topology.c @@ -127,15 +127,14 @@ void s390_topology_new_cpu(int core_id) S390TopologyBook *book; S390TopologySocket *socket; S390TopologyCores *cores; - int cores_per_socket, sock_idx; int origin, bit; + int nb_cores_per_socket; book = s390_get_topology(); - cores_per_socket = ms->smp.max_cpus / ms->smp.sockets; - - sock_idx = (core_id / cores_per_socket); - socket = s390_get_socket(book, sock_idx); + /* Cores for the S390 topology are cores and threads of the QEMU topology */ + nb_cores_per_socket = ms->smp.cores * ms->smp.threads; + socket = s390_get_socket(book, core_id / nb_cores_per_socket); /* * At the core level, each CPU is represented by a bit in a 64bit @@ -151,12 +150,11 @@ void s390_topology_new_cpu(int core_id) * CPU inside several CPU containers inside the socket container. */ origin = 64 * (core_id / 64); - cores = s390_get_cores(socket, origin); + cores->origin = origin; bit = 63 - (core_id - origin); set_bit(bit, &cores->mask); - cores->origin = origin; } /* diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 071b3badf4..b97efe85a5 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -892,4 +892,5 @@ typedef S390CPU ArchCPU; #include "exec/cpu-all.h" +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar); #endif diff --git a/target/s390x/cpu_topology.c b/target/s390x/cpu_topology.c new file mode 100644 index 0000000000..7f6db18829 --- /dev/null +++ b/target/s390x/cpu_topology.c @@ -0,0 +1,112 @@ +/* + * QEMU S390x CPU Topology + * + * Copyright IBM Corp. 2021 + * Author(s): Pierre Morel <pmorel@linux.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "hw/s390x/pv.h" +#include "hw/sysbus.h" +#include "hw/s390x/cpu-topology.h" + +static int stsi_15_container(void *p, int nl, int id) +{ + SysIBTl_container *tle = (SysIBTl_container *)p; + + tle->nl = nl; + tle->id = id; + + return sizeof(*tle); +} + +static int stsi_15_cpus(void *p, S390TopologyCores *cd) +{ + SysIBTl_cpu *tle = (SysIBTl_cpu *)p; + + tle->nl = 0; + tle->dedicated = cd->dedicated; + tle->polarity = cd->polarity; + tle->type = cd->cputype; + tle->origin = be16_to_cpu(cd->origin); + tle->mask = be64_to_cpu(cd->mask); + + return sizeof(*tle); +} + +static int set_socket(const MachineState *ms, void *p, + S390TopologySocket *socket) +{ + BusChild *kid; + int l, len = 0; + + len += stsi_15_container(p, 1, socket->socket_id); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &socket->bus->children, sibling) { + l = stsi_15_cpus(p, S390_TOPOLOGY_CORES(kid->child)); + p += l; + len += l; + } + return len; +} + +static void setup_stsi(const MachineState *ms, void *p, int level) +{ + S390TopologyBook *book; + SysIB_151x *sysib; + BusChild *kid; + int len, l; + + sysib = (SysIB_151x *)p; + sysib->mnest = level; + sysib->mag[TOPOLOGY_NR_MAG2] = ms->smp.sockets; + sysib->mag[TOPOLOGY_NR_MAG1] = ms->smp.cores * ms->smp.threads; + + book = s390_get_topology(); + len = sizeof(SysIB_151x); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &book->bus->children, sibling) { + l = set_socket(ms, p, S390_TOPOLOGY_SOCKET(kid->child)); + p += l; + len += l; + } + + sysib->length = be16_to_cpu(len); +} + +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) +{ + const MachineState *machine = MACHINE(qdev_get_machine()); + void *p; + int ret, cc; + + /* + * Until the SCLP STSI Facility reporting the MNEST value is used, + * a sel2 value of 2 is the only value allowed in STSI 15.1.x. + */ + if (sel2 != 2) { + setcc(cpu, 3); + return; + } + + p = g_malloc0(TARGET_PAGE_SIZE); + + setup_stsi(machine, p, 2); + + if (s390_is_pv()) { + ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); + } else { + ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, TARGET_PAGE_SIZE); + } + cc = ret ? 3 : 0; + setcc(cpu, cc); + g_free(p); +} + diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 5b1fdb55c4..c17e92fc9c 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -52,6 +52,7 @@ #include "hw/s390x/s390-virtio-ccw.h" #include "hw/s390x/s390-virtio-hcall.h" #include "hw/s390x/pv.h" +#include "hw/s390x/cpu-topology.h" #ifndef DEBUG_KVM #define DEBUG_KVM 0 @@ -1906,6 +1907,10 @@ static int handle_stsi(S390CPU *cpu) /* Only sysib 3.2.2 needs post-handling for now. */ insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); return 0; + case 15: + insert_stsi_15_1_x(cpu, run->s390_stsi.sel2, run->s390_stsi.addr, + run->s390_stsi.ar); + return 0; default: return 0; } diff --git a/target/s390x/meson.build b/target/s390x/meson.build index 84c1402a6a..890ccfa789 100644 --- a/target/s390x/meson.build +++ b/target/s390x/meson.build @@ -29,6 +29,7 @@ s390x_softmmu_ss.add(files( 'sigp.c', 'cpu-sysemu.c', 'cpu_models_sysemu.c', + 'cpu_topology.c', )) s390x_user_ss = ss.source_set() -- 2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Pierre Morel <pmorel@linux.ibm.com> To: qemu-s390x@nongnu.org Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Subject: [PATCH v5 04/12] s390x: topology: implementating Store Topology System Information Date: Thu, 9 Dec 2021 14:46:35 +0100 [thread overview] Message-ID: <20211209134643.143866-5-pmorel@linux.ibm.com> (raw) In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> The handling of STSI is enhanced with the interception of the function code 15 for storing CPU topology. Using the objects built during the pluging of CPU, we build the SYSIB 15_1_x structures. With this patch the maximum MNEST level is 2, this is also the only level allowed and only SYSIB 15_1_2 will be built. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> --- hw/s390x/cpu-topology.c | 12 ++-- target/s390x/cpu.h | 1 + target/s390x/cpu_topology.c | 112 ++++++++++++++++++++++++++++++++++++ target/s390x/kvm/kvm.c | 5 ++ target/s390x/meson.build | 1 + 5 files changed, 124 insertions(+), 7 deletions(-) create mode 100644 target/s390x/cpu_topology.c diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c index b7131b4ac3..74e04fd68e 100644 --- a/hw/s390x/cpu-topology.c +++ b/hw/s390x/cpu-topology.c @@ -127,15 +127,14 @@ void s390_topology_new_cpu(int core_id) S390TopologyBook *book; S390TopologySocket *socket; S390TopologyCores *cores; - int cores_per_socket, sock_idx; int origin, bit; + int nb_cores_per_socket; book = s390_get_topology(); - cores_per_socket = ms->smp.max_cpus / ms->smp.sockets; - - sock_idx = (core_id / cores_per_socket); - socket = s390_get_socket(book, sock_idx); + /* Cores for the S390 topology are cores and threads of the QEMU topology */ + nb_cores_per_socket = ms->smp.cores * ms->smp.threads; + socket = s390_get_socket(book, core_id / nb_cores_per_socket); /* * At the core level, each CPU is represented by a bit in a 64bit @@ -151,12 +150,11 @@ void s390_topology_new_cpu(int core_id) * CPU inside several CPU containers inside the socket container. */ origin = 64 * (core_id / 64); - cores = s390_get_cores(socket, origin); + cores->origin = origin; bit = 63 - (core_id - origin); set_bit(bit, &cores->mask); - cores->origin = origin; } /* diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 071b3badf4..b97efe85a5 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -892,4 +892,5 @@ typedef S390CPU ArchCPU; #include "exec/cpu-all.h" +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar); #endif diff --git a/target/s390x/cpu_topology.c b/target/s390x/cpu_topology.c new file mode 100644 index 0000000000..7f6db18829 --- /dev/null +++ b/target/s390x/cpu_topology.c @@ -0,0 +1,112 @@ +/* + * QEMU S390x CPU Topology + * + * Copyright IBM Corp. 2021 + * Author(s): Pierre Morel <pmorel@linux.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "hw/s390x/pv.h" +#include "hw/sysbus.h" +#include "hw/s390x/cpu-topology.h" + +static int stsi_15_container(void *p, int nl, int id) +{ + SysIBTl_container *tle = (SysIBTl_container *)p; + + tle->nl = nl; + tle->id = id; + + return sizeof(*tle); +} + +static int stsi_15_cpus(void *p, S390TopologyCores *cd) +{ + SysIBTl_cpu *tle = (SysIBTl_cpu *)p; + + tle->nl = 0; + tle->dedicated = cd->dedicated; + tle->polarity = cd->polarity; + tle->type = cd->cputype; + tle->origin = be16_to_cpu(cd->origin); + tle->mask = be64_to_cpu(cd->mask); + + return sizeof(*tle); +} + +static int set_socket(const MachineState *ms, void *p, + S390TopologySocket *socket) +{ + BusChild *kid; + int l, len = 0; + + len += stsi_15_container(p, 1, socket->socket_id); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &socket->bus->children, sibling) { + l = stsi_15_cpus(p, S390_TOPOLOGY_CORES(kid->child)); + p += l; + len += l; + } + return len; +} + +static void setup_stsi(const MachineState *ms, void *p, int level) +{ + S390TopologyBook *book; + SysIB_151x *sysib; + BusChild *kid; + int len, l; + + sysib = (SysIB_151x *)p; + sysib->mnest = level; + sysib->mag[TOPOLOGY_NR_MAG2] = ms->smp.sockets; + sysib->mag[TOPOLOGY_NR_MAG1] = ms->smp.cores * ms->smp.threads; + + book = s390_get_topology(); + len = sizeof(SysIB_151x); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &book->bus->children, sibling) { + l = set_socket(ms, p, S390_TOPOLOGY_SOCKET(kid->child)); + p += l; + len += l; + } + + sysib->length = be16_to_cpu(len); +} + +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) +{ + const MachineState *machine = MACHINE(qdev_get_machine()); + void *p; + int ret, cc; + + /* + * Until the SCLP STSI Facility reporting the MNEST value is used, + * a sel2 value of 2 is the only value allowed in STSI 15.1.x. + */ + if (sel2 != 2) { + setcc(cpu, 3); + return; + } + + p = g_malloc0(TARGET_PAGE_SIZE); + + setup_stsi(machine, p, 2); + + if (s390_is_pv()) { + ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); + } else { + ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, TARGET_PAGE_SIZE); + } + cc = ret ? 3 : 0; + setcc(cpu, cc); + g_free(p); +} + diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 5b1fdb55c4..c17e92fc9c 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -52,6 +52,7 @@ #include "hw/s390x/s390-virtio-ccw.h" #include "hw/s390x/s390-virtio-hcall.h" #include "hw/s390x/pv.h" +#include "hw/s390x/cpu-topology.h" #ifndef DEBUG_KVM #define DEBUG_KVM 0 @@ -1906,6 +1907,10 @@ static int handle_stsi(S390CPU *cpu) /* Only sysib 3.2.2 needs post-handling for now. */ insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); return 0; + case 15: + insert_stsi_15_1_x(cpu, run->s390_stsi.sel2, run->s390_stsi.addr, + run->s390_stsi.ar); + return 0; default: return 0; } diff --git a/target/s390x/meson.build b/target/s390x/meson.build index 84c1402a6a..890ccfa789 100644 --- a/target/s390x/meson.build +++ b/target/s390x/meson.build @@ -29,6 +29,7 @@ s390x_softmmu_ss.add(files( 'sigp.c', 'cpu-sysemu.c', 'cpu_models_sysemu.c', + 'cpu_topology.c', )) s390x_user_ss = ss.source_set() -- 2.27.0
next prev parent reply other threads:[~2021-12-09 13:46 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-09 13:46 [PATCH v5 00/12] s390x: CPU Topology Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 01/12] s390x: cpu topology: update linux headers Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 02/12] s390x: SCLP: reporting the maximum nested topology entries Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 03/12] s390x: topology: CPU topology objects and structures Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` Pierre Morel [this message] 2021-12-09 13:46 ` [PATCH v5 04/12] s390x: topology: implementating Store Topology System Information Pierre Morel 2021-12-09 13:46 ` [PATCH v5 05/12] s390x: CPU topology: CPU topology migration Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 06/12] s390x: kvm: topology: interception of PTF instruction Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 07/12] s390: topology: Adding books to CPU topology Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 08/12] s390: topology: Adding books to STSI Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 09/12] s390: topology: Adding drawers to CPU topology Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 10/12] s390: topology: Adding drawers to STSI Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 11/12] s390x: topology: implementing numa for the s390x topology Pierre Morel 2021-12-09 13:46 ` Pierre Morel 2021-12-09 13:46 ` [PATCH v5 12/12] s390: Topology: documentation Pierre Morel 2021-12-09 13:46 ` Pierre Morel
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