From: Jakub Kicinski <kuba@kernel.org>
To: Maciej Machnikowski <maciej.machnikowski@intel.com>
Cc: netdev@vger.kernel.org, intel-wired-lan@lists.osuosl.org,
arkadiusz.kubalewski@intel.com, richardcochran@gmail.com,
abyagowi@fb.com, anthony.l.nguyen@intel.com, davem@davemloft.net,
linux-kselftest@vger.kernel.org, idosch@idosch.org,
mkubecek@suse.cz, saeed@kernel.org, michael.chan@broadcom.com,
petrm@nvidia.com, Vadim Fedorenko <vfedorenko@novek.ru>
Subject: Re: [PATCH v5 net-next 0/4] Add ethtool interface for RClocks
Date: Fri, 10 Dec 2021 08:16:54 -0800 [thread overview]
Message-ID: <20211210081654.233a41b6@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> (raw)
In-Reply-To: <20211210134550.1195182-1-maciej.machnikowski@intel.com>
On Fri, 10 Dec 2021 14:45:46 +0100 Maciej Machnikowski wrote:
> Synchronous Ethernet networks use a physical layer clock to syntonize
> the frequency across different network elements.
>
> Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet
> Equipment Clock (EEC) and have the ability to synchronize to reference
> frequency sources.
>
> This patch series is a prerequisite for EEC object and adds ability
> to enable recovered clocks in the physical layer of the netdev object.
> Recovered clocks can be used as one of the reference signal by the EEC.
>
> Further work is required to add the DPLL subsystem, link it to the
> netdev object and create API to read the EEC DPLL state.
You missed CCing Vadim. I guess Ccing the right people may be right up
there with naming things as the hardest things in SW development..
Anyway, Vadim - do you have an ETA on the first chunk of the PLL work?
WARNING: multiple messages have this Message-ID (diff)
From: Jakub Kicinski <kuba@kernel.org>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [PATCH v5 net-next 0/4] Add ethtool interface for RClocks
Date: Fri, 10 Dec 2021 08:16:54 -0800 [thread overview]
Message-ID: <20211210081654.233a41b6@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com> (raw)
In-Reply-To: <20211210134550.1195182-1-maciej.machnikowski@intel.com>
On Fri, 10 Dec 2021 14:45:46 +0100 Maciej Machnikowski wrote:
> Synchronous Ethernet networks use a physical layer clock to syntonize
> the frequency across different network elements.
>
> Basic SyncE node defined in the ITU-T G.8264 consist of an Ethernet
> Equipment Clock (EEC) and have the ability to synchronize to reference
> frequency sources.
>
> This patch series is a prerequisite for EEC object and adds ability
> to enable recovered clocks in the physical layer of the netdev object.
> Recovered clocks can be used as one of the reference signal by the EEC.
>
> Further work is required to add the DPLL subsystem, link it to the
> netdev object and create API to read the EEC DPLL state.
You missed CCing Vadim. I guess Ccing the right people may be right up
there with naming things as the hardest things in SW development..
Anyway, Vadim - do you have an ETA on the first chunk of the PLL work?
next prev parent reply other threads:[~2021-12-10 16:17 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-10 13:45 [PATCH v5 net-next 0/4] Add ethtool interface for RClocks Maciej Machnikowski
2021-12-10 13:45 ` [Intel-wired-lan] " Maciej Machnikowski
2021-12-10 13:45 ` [PATCH v5 net-next 1/4] ice: add support detecting features based on netlist Maciej Machnikowski
2021-12-10 13:45 ` [Intel-wired-lan] " Maciej Machnikowski
2021-12-10 13:45 ` [PATCH v5 net-next 2/4] ethtool: Add ability to configure recovered clock for SyncE feature Maciej Machnikowski
2021-12-10 13:45 ` [Intel-wired-lan] " Maciej Machnikowski
2021-12-10 13:45 ` [PATCH v5 net-next 3/4] ice: add support for monitoring SyncE DPLL state Maciej Machnikowski
2021-12-10 13:45 ` [Intel-wired-lan] " Maciej Machnikowski
2021-12-10 13:45 ` [PATCH v5 net-next 4/4] ice: add support for recovered clocks Maciej Machnikowski
2021-12-10 13:45 ` [Intel-wired-lan] " Maciej Machnikowski
2021-12-10 16:16 ` Jakub Kicinski [this message]
2021-12-10 16:16 ` [Intel-wired-lan] [PATCH v5 net-next 0/4] Add ethtool interface for RClocks Jakub Kicinski
2021-12-13 8:53 ` Machnikowski, Maciej
2021-12-13 8:53 ` [Intel-wired-lan] " Machnikowski, Maciej
2021-12-15 12:14 ` Kubalewski, Arkadiusz
2021-12-15 12:14 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2021-12-15 22:27 ` Vadim Fedorenko
2021-12-15 22:27 ` [Intel-wired-lan] " Vadim Fedorenko
2021-12-17 0:01 ` Kubalewski, Arkadiusz
2021-12-17 0:01 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2022-01-19 22:33 ` Kubalewski, Arkadiusz
2022-01-19 22:33 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2021-12-12 11:47 ` Ido Schimmel
2021-12-12 11:47 ` [Intel-wired-lan] " Ido Schimmel
2021-12-15 12:13 ` Machnikowski, Maciej
2021-12-15 12:13 ` [Intel-wired-lan] " Machnikowski, Maciej
2021-12-20 13:50 ` Ido Schimmel
2021-12-20 13:50 ` [Intel-wired-lan] " Ido Schimmel
2021-12-21 22:12 ` Machnikowski, Maciej
2021-12-21 22:12 ` [Intel-wired-lan] " Machnikowski, Maciej
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