From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [PATCH 5.10.y-cip 12/24] arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK
Date: Thu, 16 Dec 2021 12:54:34 +0000 [thread overview]
Message-ID: <20211216125446.15451-13-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20211216125446.15451-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 690ea5d394eb370973ffcb9ecda6a1855fe87d01 upstream.
Add basic support for RZ/G2L SMARC EVK (based on R9A07G044L2):
- memory
- External input clock
- SCIF
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-12-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/Makefile | 2 ++
.../boot/dts/renesas/r9a07g044l2-smarc.dts | 21 +++++++++++++++
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 27 +++++++++++++++++++
3 files changed, 50 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
create mode 100644 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index dffefe030a76..8a5bc12a6d8d 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -56,3 +56,5 @@ dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb
+
+dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
new file mode 100644
index 000000000000..d3f72ec62f03
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2L SMARC EVK board
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r9a07g044l2.dtsi"
+#include "rzg2l-smarc.dtsi"
+
+/ {
+ model = "Renesas SMARC EVK based on r9a07g044l2";
+ compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
new file mode 100644
index 000000000000..adcd4f50519e
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2L SMARC EVK common parts
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ aliases {
+ serial0 = &scif0;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&extal_clk {
+ clock-frequency = <24000000>;
+};
+
+&scif0 {
+ status = "okay";
+};
--
2.17.1
next prev parent reply other threads:[~2021-12-16 12:55 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 12:54 [PATCH 5.10.y-cip 00/24] Add CPG and initial DTS/I for Renesas RZ/G2L SoC + SMARC EVK Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 01/24] dt-bindings: serial: renesas,scif: Document r9a07g044 bindings Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 02/24] serial: sh-sci: Add support for RZ/G2L SoC Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 03/24] dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 04/24] dt-bindings: clock: Add r9a07g044 CPG Clock Definitions Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 05/24] clk: renesas: Add CPG core wrapper for RZ/G2L SoC Lad Prabhakar
2021-12-17 10:10 ` Pavel Machek
2021-12-17 11:03 ` Prabhakar Mahadev Lad
2021-12-16 12:54 ` [PATCH 5.10.y-cip 06/24] clk: renesas: Add support for R9A07G044 SoC Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 07/24] clk: renesas: r9a07g044: Rename divider table Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 08/24] clk: renesas: r9a07g044: Fix P1 Clock Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 09/24] clk: renesas: r9a07g044: Add P2 Clock support Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 10/24] clk: renesas: rzg2l: Add multi clock PM support Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 11/24] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's Lad Prabhakar
2021-12-17 10:19 ` Pavel Machek
2021-12-17 11:11 ` Prabhakar Mahadev Lad
2021-12-16 12:54 ` Lad Prabhakar [this message]
2021-12-16 12:54 ` [PATCH 5.10.y-cip 13/24] arm64: dts: renesas: r9a07g044: Add SYSC node Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 14/24] dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 15/24] clk: renesas: rzg2l: Remove unneeded semicolon Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 16/24] clk: renesas: rzg2l: Fix return value and unused assignment Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 17/24] clk: renesas: rzg2l: Fix a double free on error Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 18/24] clk: renesas: rzg2l: Avoid mixing error pointers and NULL Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 19/24] clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get() Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 20/24] clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch] Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 21/24] clk: mux: provide devm_clk_hw_register_mux() Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 22/24] clk: renesas: rzg2l: Add support to handle MUX clocks Lad Prabhakar
2021-12-16 12:54 ` [PATCH 5.10.y-cip 23/24] clk: renesas: rzg2l: Add support to handle coupled clocks Lad Prabhakar
2021-12-17 10:38 ` Pavel Machek
2021-12-17 11:29 ` Prabhakar Mahadev Lad
2021-12-16 12:54 ` [PATCH 5.10.y-cip 24/24] clk: renesas: rzg2l: Fix clk status function Lad Prabhakar
2021-12-17 7:42 ` [cip-dev] [PATCH 5.10.y-cip 00/24] Add CPG and initial DTS/I for Renesas RZ/G2L SoC + SMARC EVK nobuhiro1.iwamatsu
2021-12-17 10:39 ` Pavel Machek
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