From: Emil Renner Berthing <kernel@esmil.dk>
To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Cc: Emil Renner Berthing <kernel@esmil.dk>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Arnd Bergmann <arnd@arndb.de>,
Michael Zhu <michael.zhu@starfivetech.com>,
Fu Wei <tekkamanninja@gmail.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v1 3/7] dt-bindings: clock: Add JH7100 audio clock definitions
Date: Wed, 26 Jan 2022 18:39:49 +0100 [thread overview]
Message-ID: <20220126173953.1016706-4-kernel@esmil.dk> (raw)
In-Reply-To: <20220126173953.1016706-1-kernel@esmil.dk>
Add all clock outputs for the StarFive JH7100 audio clock generator.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
---
.../dt-bindings/clock/starfive-jh7100-audio.h | 41 +++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 include/dt-bindings/clock/starfive-jh7100-audio.h
diff --git a/include/dt-bindings/clock/starfive-jh7100-audio.h b/include/dt-bindings/clock/starfive-jh7100-audio.h
new file mode 100644
index 000000000000..fbb4eae6572b
--- /dev/null
+++ b/include/dt-bindings/clock/starfive-jh7100-audio.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__
+#define __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__
+
+#define JH7100_AUDCLK_ADC_MCLK 0
+#define JH7100_AUDCLK_I2S1_MCLK 1
+#define JH7100_AUDCLK_I2SADC_APB 2
+#define JH7100_AUDCLK_I2SADC_BCLK 3
+#define JH7100_AUDCLK_I2SADC_BCLK_N 4
+#define JH7100_AUDCLK_I2SADC_LRCLK 5
+#define JH7100_AUDCLK_PDM_APB 6
+#define JH7100_AUDCLK_PDM_MCLK 7
+#define JH7100_AUDCLK_I2SVAD_APB 8
+#define JH7100_AUDCLK_SPDIF 9
+#define JH7100_AUDCLK_SPDIF_APB 10
+#define JH7100_AUDCLK_PWMDAC_APB 11
+#define JH7100_AUDCLK_DAC_MCLK 12
+#define JH7100_AUDCLK_I2SDAC_APB 13
+#define JH7100_AUDCLK_I2SDAC_BCLK 14
+#define JH7100_AUDCLK_I2SDAC_BCLK_N 15
+#define JH7100_AUDCLK_I2SDAC_LRCLK 16
+#define JH7100_AUDCLK_I2S1_APB 17
+#define JH7100_AUDCLK_I2S1_BCLK 18
+#define JH7100_AUDCLK_I2S1_BCLK_N 19
+#define JH7100_AUDCLK_I2S1_LRCLK 20
+#define JH7100_AUDCLK_I2SDAC16K_APB 21
+#define JH7100_AUDCLK_APB0_BUS 22
+#define JH7100_AUDCLK_DMA1P_AHB 23
+#define JH7100_AUDCLK_USB_APB 24
+#define JH7100_AUDCLK_USB_LPM 25
+#define JH7100_AUDCLK_USB_STB 26
+#define JH7100_AUDCLK_APB_EN 27
+#define JH7100_AUDCLK_VAD_MEM 28
+
+#define JH7100_AUDCLK_END 29
+
+#endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__ */
--
2.34.1
next prev parent reply other threads:[~2022-01-26 17:40 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-26 17:39 [PATCH v1 0/7] JH7100 Audio Clocks Emil Renner Berthing
2022-01-26 17:39 ` [PATCH v1 1/7] clk: starfive: jh7100: Don't round divisor up twice Emil Renner Berthing
2022-03-11 2:53 ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 2/7] clk: starfive: jh7100: Handle audio_div clock properly Emil Renner Berthing
2022-03-11 2:53 ` Stephen Boyd
2022-01-26 17:39 ` Emil Renner Berthing [this message]
2022-02-09 3:32 ` [PATCH v1 3/7] dt-bindings: clock: Add JH7100 audio clock definitions Rob Herring
2022-03-11 2:53 ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 4/7] dt-bindings: clock: Add starfive,jh7100-audclk bindings Emil Renner Berthing
2022-02-09 3:33 ` Rob Herring
2022-03-11 2:54 ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 5/7] clk: starfive: jh7100: Make hw clock implementation reusable Emil Renner Berthing
2022-03-11 2:54 ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 6/7] clk: starfive: jh7100: Support more clock types Emil Renner Berthing
2022-03-11 2:54 ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 7/7] clk: starfive: Add JH7100 audio clock driver Emil Renner Berthing
2022-03-11 2:54 ` Stephen Boyd
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