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From: Stephen Boyd <sboyd@kernel.org>
To: Emil Renner Berthing <kernel@esmil.dk>,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org
Cc: Emil Renner Berthing <kernel@esmil.dk>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Arnd Bergmann <arnd@arndb.de>,
	Michael Zhu <michael.zhu@starfivetech.com>,
	Fu Wei <tekkamanninja@gmail.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/7] clk: starfive: jh7100: Don't round divisor up twice
Date: Thu, 10 Mar 2022 18:53:30 -0800	[thread overview]
Message-ID: <20220311025332.75830C340E8@smtp.kernel.org> (raw)
In-Reply-To: <20220126173953.1016706-2-kernel@esmil.dk>

Quoting Emil Renner Berthing (2022-01-26 09:39:47)
> The problem is best illustrated by an example. Suppose a consumer wants
> a 4MHz clock rate from a divider with a 10MHz parent. It would then
> call
> 
>   clk_round_rate(clk, 4000000)
> 
> which would call into our determine_rate() callback that correctly
> rounds up and finds that a divisor of 3 gives the highest possible
> frequency below the requested 4MHz and returns 10000000 / 3 = 3333333Hz.
> 
> However the consumer would then call
> 
>   clk_set_rate(clk, 3333333)
> 
> but since 3333333 doesn't divide 10000000 evenly our set_rate() callback
> would again round the divisor up and set it to 4 which results in an
> unnecessarily low rate of 2.5MHz.
> 
> Fix it by using DIV_ROUND_CLOSEST in the set_rate() callback.
> 
> Fixes: 4210be668a09 ("clk: starfive: Add JH7100 clock generator driver")
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> ---

Applied to clk-next

  reply	other threads:[~2022-03-11  2:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-26 17:39 [PATCH v1 0/7] JH7100 Audio Clocks Emil Renner Berthing
2022-01-26 17:39 ` [PATCH v1 1/7] clk: starfive: jh7100: Don't round divisor up twice Emil Renner Berthing
2022-03-11  2:53   ` Stephen Boyd [this message]
2022-01-26 17:39 ` [PATCH v1 2/7] clk: starfive: jh7100: Handle audio_div clock properly Emil Renner Berthing
2022-03-11  2:53   ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 3/7] dt-bindings: clock: Add JH7100 audio clock definitions Emil Renner Berthing
2022-02-09  3:32   ` Rob Herring
2022-03-11  2:53   ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 4/7] dt-bindings: clock: Add starfive,jh7100-audclk bindings Emil Renner Berthing
2022-02-09  3:33   ` Rob Herring
2022-03-11  2:54   ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 5/7] clk: starfive: jh7100: Make hw clock implementation reusable Emil Renner Berthing
2022-03-11  2:54   ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 6/7] clk: starfive: jh7100: Support more clock types Emil Renner Berthing
2022-03-11  2:54   ` Stephen Boyd
2022-01-26 17:39 ` [PATCH v1 7/7] clk: starfive: Add JH7100 audio clock driver Emil Renner Berthing
2022-03-11  2:54   ` Stephen Boyd

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