From: Chuanhong Guo <gch981213@gmail.com> To: linux-mtd@lists.infradead.org Cc: Chuanhong Guo <gch981213@gmail.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Reto Schneider <reto.schneider@husqvarnagroup.com>, Frieder Schrempf <frieder.schrempf@kontron.de>, Stefan Roese <sr@denx.de>, linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/5] mtd: spinand: gigadevice: add support for GD5F{2,4}GQ5xExxG Date: Sun, 20 Mar 2022 18:00:00 +0800 [thread overview] Message-ID: <20220320100001.247905-5-gch981213@gmail.com> (raw) In-Reply-To: <20220320100001.247905-1-gch981213@gmail.com> Add support for: GD5F2GQ5{U,R}ExxG GD5F4GQ6{U,R}ExxG These chips uses 4 dummy bytes for quad io and 2 dummy bytes for dual io. Besides that and memory layout, they are identical to their 1G variant. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> --- drivers/mtd/nand/spi/gigadevice.c | 48 +++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c index d519bb85f0e7..fcd1c4e474a2 100644 --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c @@ -47,6 +47,14 @@ static SPINAND_OP_VARIANTS(read_cache_variants_1gq5, SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); +static SPINAND_OP_VARIANTS(read_cache_variants_2gq5, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + static SPINAND_OP_VARIANTS(write_cache_variants, SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), SPINAND_PROG_LOAD(true, 0, NULL, 0)); @@ -393,6 +401,46 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x42), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x55), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x45), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), }; static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = { -- 2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Chuanhong Guo <gch981213@gmail.com> To: linux-mtd@lists.infradead.org Cc: Chuanhong Guo <gch981213@gmail.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Reto Schneider <reto.schneider@husqvarnagroup.com>, Frieder Schrempf <frieder.schrempf@kontron.de>, Stefan Roese <sr@denx.de>, linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/5] mtd: spinand: gigadevice: add support for GD5F{2, 4}GQ5xExxG Date: Sun, 20 Mar 2022 18:00:00 +0800 [thread overview] Message-ID: <20220320100001.247905-5-gch981213@gmail.com> (raw) In-Reply-To: <20220320100001.247905-1-gch981213@gmail.com> Add support for: GD5F2GQ5{U,R}ExxG GD5F4GQ6{U,R}ExxG These chips uses 4 dummy bytes for quad io and 2 dummy bytes for dual io. Besides that and memory layout, they are identical to their 1G variant. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> --- drivers/mtd/nand/spi/gigadevice.c | 48 +++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c index d519bb85f0e7..fcd1c4e474a2 100644 --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c @@ -47,6 +47,14 @@ static SPINAND_OP_VARIANTS(read_cache_variants_1gq5, SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); +static SPINAND_OP_VARIANTS(read_cache_variants_2gq5, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + static SPINAND_OP_VARIANTS(write_cache_variants, SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), SPINAND_PROG_LOAD(true, 0, NULL, 0)); @@ -393,6 +401,46 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x42), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x55), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x45), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), }; static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = { -- 2.35.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-03-20 10:01 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-03-20 9:59 [PATCH 0/5] mtd: spinand: add support for more GD SPI NANDs Chuanhong Guo 2022-03-20 9:59 ` Chuanhong Guo 2022-03-20 9:59 ` [PATCH 1/5] mtd: spinand: gigadevice: fix Quad IO for GD5F1GQ5UExxG Chuanhong Guo 2022-03-20 9:59 ` Chuanhong Guo 2022-04-04 8:47 ` Miquel Raynal 2022-04-04 8:47 ` Miquel Raynal 2022-03-20 9:59 ` [PATCH 2/5] mtd: spinand: gigadevice: add support for GD5FxGQ4xExxG Chuanhong Guo 2022-03-20 9:59 ` Chuanhong Guo 2022-04-04 8:47 ` Miquel Raynal 2022-04-04 8:47 ` Miquel Raynal 2022-03-20 9:59 ` [PATCH 3/5] mtd: spinand: gigadevice: add support for GD5F1GQ5RExxG Chuanhong Guo 2022-03-20 9:59 ` Chuanhong Guo 2022-04-04 8:47 ` Miquel Raynal 2022-04-04 8:47 ` Miquel Raynal 2022-03-20 10:00 ` Chuanhong Guo [this message] 2022-03-20 10:00 ` [PATCH 4/5] mtd: spinand: gigadevice: add support for GD5F{2, 4}GQ5xExxG Chuanhong Guo 2022-04-04 8:47 ` Miquel Raynal 2022-04-04 8:47 ` Miquel Raynal 2022-03-20 10:00 ` [PATCH 5/5] mtd: spinand: gigadevice: add support for GD5FxGM7xExxG Chuanhong Guo 2022-03-20 10:00 ` Chuanhong Guo 2022-04-04 8:47 ` Miquel Raynal 2022-04-04 8:47 ` Miquel Raynal
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