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From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Stefan Hajnoczi" <stefanha@redhat.com>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Mathieu Poirier" <mathieu.poirier@linaro.org>,
	"Dr . David Alan Gilbert" <dgilbert@redhat.com>,
	"Kashyap Chamarthy" <kchamart@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PULL v2 66/86] docs/devel: start documenting writing VirtIO devices
Date: Mon, 16 May 2022 16:54:38 -0400	[thread overview]
Message-ID: <20220516204913.542894-67-mst@redhat.com> (raw)
In-Reply-To: <20220516204913.542894-1-mst@redhat.com>

From: Alex Bennée <alex.bennee@linaro.org>

While writing my own VirtIO devices I've gotten confused with how
things are structured and what sort of shared infrastructure there is.
If we can document how everything is supposed to work we can then
maybe start cleaning up inconsistencies in the code.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20220309164929.19395-1-alex.bennee@linaro.org>

Message-Id: <20220321153037.3622127-10-alex.bennee@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 docs/devel/index-internals.rst |   1 +
 docs/devel/virtio-backends.rst | 214 +++++++++++++++++++++++++++++++++
 2 files changed, 215 insertions(+)
 create mode 100644 docs/devel/virtio-backends.rst

diff --git a/docs/devel/index-internals.rst b/docs/devel/index-internals.rst
index a50889c556..e1a93df263 100644
--- a/docs/devel/index-internals.rst
+++ b/docs/devel/index-internals.rst
@@ -18,3 +18,4 @@ Details about QEMU's various subsystems including how to add features to them.
    tracing
    vfio-migration
    writing-monitor-commands
+   virtio-backends
diff --git a/docs/devel/virtio-backends.rst b/docs/devel/virtio-backends.rst
new file mode 100644
index 0000000000..9ff092e7a0
--- /dev/null
+++ b/docs/devel/virtio-backends.rst
@@ -0,0 +1,214 @@
+..
+   Copyright (c) 2022, Linaro Limited
+   Written by Alex Bennée
+
+Writing VirtIO backends for QEMU
+================================
+
+This document attempts to outline the information a developer needs to
+know to write device emulations in QEMU. It is specifically focused on
+implementing VirtIO devices. For VirtIO the frontend is the driver
+running on the guest. The backend is the everything that QEMU needs to
+do to handle the emulation of the VirtIO device. This can be done
+entirely in QEMU, divided between QEMU and the kernel (vhost) or
+handled by a separate process which is configured by QEMU
+(vhost-user).
+
+VirtIO Transports
+-----------------
+
+VirtIO supports a number of different transports. While the details of
+the configuration and operation of the device will generally be the
+same QEMU represents them as different devices depending on the
+transport they use. For example -device virtio-foo represents the foo
+device using mmio and -device virtio-foo-pci is the same class of
+device using the PCI transport.
+
+Using the QEMU Object Model (QOM)
+---------------------------------
+
+Generally all devices in QEMU are super classes of ``TYPE_DEVICE``
+however VirtIO devices should be based on ``TYPE_VIRTIO_DEVICE`` which
+itself is derived from the base class. For example:
+
+.. code:: c
+
+  static const TypeInfo virtio_blk_info = {
+      .name = TYPE_VIRTIO_BLK,
+      .parent = TYPE_VIRTIO_DEVICE,
+      .instance_size = sizeof(VirtIOBlock),
+      .instance_init = virtio_blk_instance_init,
+      .class_init = virtio_blk_class_init,
+  };
+
+The author may decide to have a more expansive class hierarchy to
+support multiple device types. For example the Virtio GPU device:
+
+.. code:: c
+
+  static const TypeInfo virtio_gpu_base_info = {
+      .name = TYPE_VIRTIO_GPU_BASE,
+      .parent = TYPE_VIRTIO_DEVICE,
+      .instance_size = sizeof(VirtIOGPUBase),
+      .class_size = sizeof(VirtIOGPUBaseClass),
+      .class_init = virtio_gpu_base_class_init,
+      .abstract = true
+  };
+
+  static const TypeInfo vhost_user_gpu_info = {
+      .name = TYPE_VHOST_USER_GPU,
+      .parent = TYPE_VIRTIO_GPU_BASE,
+      .instance_size = sizeof(VhostUserGPU),
+      .instance_init = vhost_user_gpu_instance_init,
+      .instance_finalize = vhost_user_gpu_instance_finalize,
+      .class_init = vhost_user_gpu_class_init,
+  };
+
+  static const TypeInfo virtio_gpu_info = {
+      .name = TYPE_VIRTIO_GPU,
+      .parent = TYPE_VIRTIO_GPU_BASE,
+      .instance_size = sizeof(VirtIOGPU),
+      .class_size = sizeof(VirtIOGPUClass),
+      .class_init = virtio_gpu_class_init,
+  };
+
+defines a base class for the VirtIO GPU and then specialises two
+versions, one for the internal implementation and the other for the
+vhost-user version.
+
+VirtIOPCIProxy
+^^^^^^^^^^^^^^
+
+[AJB: the following is supposition and welcomes more informed
+opinions]
+
+Probably due to legacy from the pre-QOM days PCI VirtIO devices don't
+follow the normal hierarchy. Instead the a standalone object is based
+on the VirtIOPCIProxy class and the specific VirtIO instance is
+manually instantiated:
+
+.. code:: c
+
+  /*
+   * virtio-blk-pci: This extends VirtioPCIProxy.
+   */
+  #define TYPE_VIRTIO_BLK_PCI "virtio-blk-pci-base"
+  DECLARE_INSTANCE_CHECKER(VirtIOBlkPCI, VIRTIO_BLK_PCI,
+                           TYPE_VIRTIO_BLK_PCI)
+
+  struct VirtIOBlkPCI {
+      VirtIOPCIProxy parent_obj;
+      VirtIOBlock vdev;
+  };
+
+  static Property virtio_blk_pci_properties[] = {
+      DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
+      DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
+                      VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
+      DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
+                         DEV_NVECTORS_UNSPECIFIED),
+      DEFINE_PROP_END_OF_LIST(),
+  };
+
+  static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
+  {
+      VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev);
+      DeviceState *vdev = DEVICE(&dev->vdev);
+
+      ...
+
+      qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
+  }
+
+  static void virtio_blk_pci_class_init(ObjectClass *klass, void *data)
+  {
+      DeviceClass *dc = DEVICE_CLASS(klass);
+      VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
+      PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
+
+      set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
+      device_class_set_props(dc, virtio_blk_pci_properties);
+      k->realize = virtio_blk_pci_realize;
+      pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
+      pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK;
+      pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
+      pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI;
+  }
+
+  static void virtio_blk_pci_instance_init(Object *obj)
+  {
+      VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj);
+
+      virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
+                                  TYPE_VIRTIO_BLK);
+      object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
+                                "bootindex");
+  }
+
+  static const VirtioPCIDeviceTypeInfo virtio_blk_pci_info = {
+      .base_name              = TYPE_VIRTIO_BLK_PCI,
+      .generic_name           = "virtio-blk-pci",
+      .transitional_name      = "virtio-blk-pci-transitional",
+      .non_transitional_name  = "virtio-blk-pci-non-transitional",
+      .instance_size = sizeof(VirtIOBlkPCI),
+      .instance_init = virtio_blk_pci_instance_init,
+      .class_init    = virtio_blk_pci_class_init,
+  };
+
+Here you can see the instance_init has to manually instantiate the
+underlying ``TYPE_VIRTIO_BLOCK`` object and link an alias for one of
+it's properties to the PCI device.
+
+  
+Back End Implementations
+------------------------
+
+There are a number of places where the implementation of the backend
+can be done:
+
+* in QEMU itself
+* in the host kernel (a.k.a vhost)
+* in a separate process (a.k.a. vhost-user)
+
+vhost_ops vs TYPE_VHOST_USER_BACKEND
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+There are two choices to how to implement vhost code. Most of the code
+which has to work with either vhost or vhost-user uses
+``vhost_dev_init()`` to instantiate the appropriate backend. This
+means including a ``struct vhost_dev`` in the main object structure.
+
+For vhost-user devices you also need to add code to track the
+initialisation of the ``chardev`` device used for the control socket
+between QEMU and the external vhost-user process.
+
+If you only need to implement a vhost-user backed the other option is
+a use a QOM-ified version of vhost-user.
+
+.. code:: c
+
+  static void
+  vhost_user_gpu_instance_init(Object *obj)
+  {
+      VhostUserGPU *g = VHOST_USER_GPU(obj);
+
+      g->vhost = VHOST_USER_BACKEND(object_new(TYPE_VHOST_USER_BACKEND));
+      object_property_add_alias(obj, "chardev",
+                                OBJECT(g->vhost), "chardev");
+  }
+
+  static const TypeInfo vhost_user_gpu_info = {
+      .name = TYPE_VHOST_USER_GPU,
+      .parent = TYPE_VIRTIO_GPU_BASE,
+      .instance_size = sizeof(VhostUserGPU),
+      .instance_init = vhost_user_gpu_instance_init,
+      .instance_finalize = vhost_user_gpu_instance_finalize,
+      .class_init = vhost_user_gpu_class_init,
+  };
+
+Using it this way entails adding a ``struct VhostUserBackend`` to your
+core object structure and manually instantiating the backend. This
+sub-structure tracks both the ``vhost_dev`` and ``CharDev`` types
+needed for the connection. Instead of calling ``vhost_dev_init`` you
+would call ``vhost_user_backend_dev_init`` which does what is needed
+on your behalf.
-- 
MST



  parent reply	other threads:[~2022-05-16 21:47 UTC|newest]

Thread overview: 109+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-16 20:49 [PULL v2 00/86] virtio,pc,pci: fixes,cleanups,features Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 01/86] virtio: fix feature negotiation for ACCESS_PLATFORM Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 02/86] intel-iommu: correct the value used for error_setg_errno() Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 03/86] hw/pci/cxl: Add a CXL component type (interface) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 04/86] hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 05/86] MAINTAINERS: Add entry for Compute Express Link Emulation Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 06/86] hw/cxl/device: Introduce a CXL device (8.2.8) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 07/86] hw/cxl/device: Implement the CAP array (8.2.8.1-2) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 08/86] hw/cxl/device: Implement basic mailbox (8.2.8.4) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 09/86] hw/cxl/device: Add memory device utilities Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 10/86] hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 11/86] hw/cxl/device: Timestamp implementation (8.2.9.3) Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 12/86] hw/cxl/device: Add log commands (8.2.9.4) + CEL Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 13/86] hw/pxb: Use a type for realizing expanders Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 14/86] hw/pci/cxl: Create a CXL bus type Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 15/86] cxl: Machine level control on whether CXL support is enabled Michael S. Tsirkin
2022-05-16 20:50 ` [PULL v2 16/86] hw/pxb: Allow creation of a CXL PXB (host bridge) Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 17/86] qtest/cxl: Introduce initial test for pxb-cxl only Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 18/86] hw/cxl/rp: Add a root port Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 19/86] hw/cxl/device: Add a memory device (8.2.8.5) Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 20/86] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12) Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 21/86] hw/cxl/device: Add some trivial commands Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 22/86] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 23/86] hw/cxl/device: Implement get/set Label Storage Area (LSA) Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 24/86] qtests/cxl: Add initial root port and CXL type3 tests Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 25/86] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142) Michael S. Tsirkin
2022-06-16 14:45   ` Igor Mammedov
2022-06-17 10:51     ` Jonathan Cameron via
2022-06-17 11:56       ` Igor Mammedov
2022-05-16 20:51 ` [PULL v2 26/86] acpi/cxl: Add _OSC implementation (9.14.2) Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 27/86] acpi/cxl: Create the CEDT (9.14.1) Michael S. Tsirkin
2022-05-16 20:51 ` [PULL v2 28/86] hw/cxl/component: Add utils for interleave parameter encoding/decoding Michael S. Tsirkin
2022-06-27 13:29   ` Peter Maydell
2022-06-27 14:59     ` Jonathan Cameron via
2022-05-16 20:51 ` [PULL v2 29/86] hw/cxl/host: Add support for CXL Fixed Memory Windows Michael S. Tsirkin
2022-07-19 13:57   ` Peter Maydell
2022-05-16 20:51 ` [PULL v2 30/86] acpi/cxl: Introduce CFMWS structures in CEDT Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 31/86] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 32/86] pci/pcie_port: Add pci_find_port_by_pn() Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 33/86] CXL/cxl_component: Add cxl_get_hb_cstate() Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 34/86] mem/cxl_type3: Add read and write functions for associated hostmem Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 35/86] cxl/cxl-host: Add memops for CFMWS region Michael S. Tsirkin
2022-07-20 12:23   ` Peter Maydell
2022-07-21 14:37     ` Jonathan Cameron via
2022-05-16 20:52 ` [PULL v2 36/86] hw/cxl/component Add a dumb HDM decoder handler Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 37/86] i386/pc: Enable CXL fixed memory windows Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 38/86] tests/acpi: q35: Allow addition of a CXL test Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 39/86] qtests/bios-tables-test: Add a test for CXL emulation Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 40/86] tests/acpi: Add tables " Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 41/86] qtest/cxl: Add more complex test cases with CFMWs Michael S. Tsirkin
2022-05-16 20:52 ` [PULL v2 42/86] docs/cxl: Add initial Compute eXpress Link (CXL) documentation Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 43/86] vhost: Track descriptor chain in private at SVQ Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 44/86] vhost: Fix device's used descriptor dequeue Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 45/86] vdpa: Fix bad index calculus at vhost_vdpa_get_vring_base Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 46/86] vdpa: Fix index calculus at vhost_vdpa_svqs_start Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 47/86] hw/virtio: Replace g_memdup() by g_memdup2() Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 48/86] vhost: Fix element in vhost_svq_add failure Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 49/86] target/i386: Fix sanity check on max APIC ID / X2APIC enablement Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 50/86] intel_iommu: Support IR-only mode without DMA translation Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 51/86] intel_iommu: Only allow interrupt remapping to be enabled if it's supported Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 52/86] intel_iommu: Fix irqchip / X2APIC configuration checks Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 53/86] intel-iommu: remove VTD_FR_RESERVED_ERR Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 54/86] intel-iommu: block output address in interrupt address range Michael S. Tsirkin
2022-05-16 20:53 ` [PULL v2 55/86] intel-iommu: update root_scalable before switching as during post_load Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 56/86] intel-iommu: update iq_dw during post load Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 57/86] vhost_net: Print feature masks in hex Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 58/86] hw/virtio: move virtio-pci.h into shared include space Michael S. Tsirkin
2022-05-16 20:54   ` [Virtio-fs] " Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 59/86] virtio-pci: add notification trace points Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 60/86] hw/virtio: add vhost_user_[read|write] " Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 61/86] docs: vhost-user: clean up request/reply description Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 62/86] docs: vhost-user: rewrite section on ring state machine Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 63/86] docs: vhost-user: replace master/slave with front-end/back-end Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 64/86] vhost-user.rst: add clarifying language about protocol negotiation Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 65/86] libvhost-user: expose vu_request_to_string Michael S. Tsirkin
2022-05-16 20:54 ` Michael S. Tsirkin [this message]
2022-05-16 20:54 ` [PULL v2 67/86] include/hw: start documenting the vhost API Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 68/86] hw/virtio/vhost-user: don't suppress F_CONFIG when supported Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 69/86] virtio/vhost-user: dynamically assign VhostUserHostNotifiers Michael S. Tsirkin
2022-05-16 20:54 ` [PULL v2 70/86] virtio: drop name parameter for virtio_init() Michael S. Tsirkin
2022-05-16 20:54   ` [Virtio-fs] " Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 71/86] virtio: add vhost support for virtio devices Michael S. Tsirkin
2022-05-16 20:55   ` [Virtio-fs] " Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 72/86] vhost-user: more master/slave things Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 73/86] docs/vhost-user: Clarifications for VHOST_USER_ADD/REM_MEM_REG Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 74/86] include/hw/pci/pcie_host: Correct PCIE_MMCFG_BUS_MASK Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 75/86] include/hw/pci/pcie_host: Correct PCIE_MMCFG_SIZE_MAX Michael S. Tsirkin
2022-05-26 13:27   ` Daniel Henrique Barboza
2022-05-26 15:54     ` BALATON Zoltan
2022-05-26 16:43       ` BALATON Zoltan
2022-05-26 19:13         ` Michael S. Tsirkin
2022-05-26 19:34           ` BALATON Zoltan
2022-05-26 19:55             ` Michael S. Tsirkin
2022-05-26 20:51               ` BALATON Zoltan
2022-05-30  9:42       ` Thomas Huth
2022-05-30 10:09         ` Cédric Le Goater
2022-05-30 16:00         ` Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 76/86] hw/i386: Make pit a property of common x86 base machine type Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 77/86] hw/i386: Make pic " Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 78/86] hw/i386/amd_iommu: Fix IOMMU event log encoding errors Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 79/86] virtio-net: setup vhost_dev and notifiers for cvq only when feature is negotiated Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 80/86] virtio-net: align ctrl_vq index for non-mq guest for vhost_vdpa Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 81/86] vhost-vdpa: fix improper cleanup in net_init_vhost_vdpa Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 82/86] vhost-net: fix improper cleanup in vhost_net_start Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 83/86] vhost-vdpa: backend feature should set only once Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 84/86] vhost-vdpa: change name and polarity for vhost_vdpa_one_time_request() Michael S. Tsirkin
2022-05-16 20:55 ` [PULL v2 85/86] virtio-net: don't handle mq request in userspace handler for vhost-vdpa Michael S. Tsirkin
2022-05-16 20:56 ` [PULL v2 86/86] vhost-user-scsi: avoid unlink(NULL) with fd passing Michael S. Tsirkin
2022-05-17  3:01 ` [PULL v2 00/86] virtio,pc,pci: fixes,cleanups,features Richard Henderson

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