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From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Anup Patel <anup@brainfault.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 0/2] introduce unified static key mechanism for ISA ext
Date: Wed, 18 May 2022 02:44:51 +0800	[thread overview]
Message-ID: <20220517184453.3558-1-jszhang@kernel.org> (raw)

Currently, riscv has several extensions which may not be supported on all
riscv platforms, for example, FPU and so on. To support unified kernel
Image style, we need to check whether the feature is suportted or not.
If the check sits at hot code path, the performance will be impacted a
lot. static key can be used to solve the issue. In the past, FPU
support has been converted to use static key mechanism. I believe we
will have similar cases in the future.

Jisheng Zhang (2):
  riscv: introduce unified static key mechanism for ISA extensions
  riscv: switch has_fpu() to the unified static key mechanism

 arch/riscv/include/asm/hwcap.h     | 40 ++++++++++++++++++++++++++++++
 arch/riscv/include/asm/switch_to.h |  5 ++--
 arch/riscv/kernel/cpufeature.c     | 14 +++++------
 3 files changed, 50 insertions(+), 9 deletions(-)

-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Anup Patel <anup@brainfault.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 0/2] introduce unified static key mechanism for ISA ext
Date: Wed, 18 May 2022 02:44:51 +0800	[thread overview]
Message-ID: <20220517184453.3558-1-jszhang@kernel.org> (raw)

Currently, riscv has several extensions which may not be supported on all
riscv platforms, for example, FPU and so on. To support unified kernel
Image style, we need to check whether the feature is suportted or not.
If the check sits at hot code path, the performance will be impacted a
lot. static key can be used to solve the issue. In the past, FPU
support has been converted to use static key mechanism. I believe we
will have similar cases in the future.

Jisheng Zhang (2):
  riscv: introduce unified static key mechanism for ISA extensions
  riscv: switch has_fpu() to the unified static key mechanism

 arch/riscv/include/asm/hwcap.h     | 40 ++++++++++++++++++++++++++++++
 arch/riscv/include/asm/switch_to.h |  5 ++--
 arch/riscv/kernel/cpufeature.c     | 14 +++++------
 3 files changed, 50 insertions(+), 9 deletions(-)

-- 
2.34.1


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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

             reply	other threads:[~2022-05-17 18:53 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17 18:44 Jisheng Zhang [this message]
2022-05-17 18:44 ` [PATCH 0/2] introduce unified static key mechanism for ISA ext Jisheng Zhang
2022-05-17 18:44 ` [PATCH 1/2] riscv: introduce unified static key mechanism for ISA extensions Jisheng Zhang
2022-05-17 18:44   ` Jisheng Zhang
2022-05-22  7:33   ` Atish Patra
2022-05-22  7:33     ` Atish Patra
2022-05-22 14:56     ` Jisheng Zhang
2022-05-22 14:56       ` Jisheng Zhang
2022-05-17 18:44 ` [PATCH 2/2] riscv: switch has_fpu() to the unified static key mechanism Jisheng Zhang
2022-05-17 18:44   ` Jisheng Zhang

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