From: Jisheng Zhang <jszhang@kernel.org> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Atish Patra <atishp@atishpatra.org>, Anup Patel <anup@brainfault.org> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] riscv: switch has_fpu() to the unified static key mechanism Date: Sun, 22 May 2022 23:35:43 +0800 [thread overview] Message-ID: <20220522153543.2656-3-jszhang@kernel.org> (raw) In-Reply-To: <20220522153543.2656-1-jszhang@kernel.org> This is to use the unified static key mechanism instead of putting static key related here and there. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/include/asm/switch_to.h | 4 ++-- arch/riscv/kernel/cpufeature.c | 7 ------- 2 files changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index 0a3f4f95c555..11463489fec6 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -8,6 +8,7 @@ #include <linux/jump_label.h> #include <linux/sched/task_stack.h> +#include <asm/hwcap.h> #include <asm/processor.h> #include <asm/ptrace.h> #include <asm/csr.h> @@ -56,10 +57,9 @@ static inline void __switch_to_aux(struct task_struct *prev, fstate_restore(next, task_pt_regs(next)); } -extern struct static_key_false cpu_hwcap_fpu; static __always_inline bool has_fpu(void) { - return static_branch_likely(&cpu_hwcap_fpu); + return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]); } #else static __always_inline bool has_fpu(void) { return false; } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 89f886b35357..0235391be84b 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -21,9 +21,6 @@ unsigned long elf_hwcap __read_mostly; /* Host ISA bitmap */ static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; -#ifdef CONFIG_FPU -__ro_after_init DEFINE_STATIC_KEY_FALSE(cpu_hwcap_fpu); -#endif __ro_after_init DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX); EXPORT_SYMBOL(riscv_isa_ext_keys); @@ -239,8 +236,4 @@ void __init riscv_fill_hwcap(void) if (j >= 0) static_branch_enable(&riscv_isa_ext_keys[j]); } -#ifdef CONFIG_FPU - if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D)) - static_branch_enable(&cpu_hwcap_fpu); -#endif } -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Atish Patra <atishp@atishpatra.org>, Anup Patel <anup@brainfault.org> Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] riscv: switch has_fpu() to the unified static key mechanism Date: Sun, 22 May 2022 23:35:43 +0800 [thread overview] Message-ID: <20220522153543.2656-3-jszhang@kernel.org> (raw) In-Reply-To: <20220522153543.2656-1-jszhang@kernel.org> This is to use the unified static key mechanism instead of putting static key related here and there. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/include/asm/switch_to.h | 4 ++-- arch/riscv/kernel/cpufeature.c | 7 ------- 2 files changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index 0a3f4f95c555..11463489fec6 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -8,6 +8,7 @@ #include <linux/jump_label.h> #include <linux/sched/task_stack.h> +#include <asm/hwcap.h> #include <asm/processor.h> #include <asm/ptrace.h> #include <asm/csr.h> @@ -56,10 +57,9 @@ static inline void __switch_to_aux(struct task_struct *prev, fstate_restore(next, task_pt_regs(next)); } -extern struct static_key_false cpu_hwcap_fpu; static __always_inline bool has_fpu(void) { - return static_branch_likely(&cpu_hwcap_fpu); + return static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_FPU]); } #else static __always_inline bool has_fpu(void) { return false; } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 89f886b35357..0235391be84b 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -21,9 +21,6 @@ unsigned long elf_hwcap __read_mostly; /* Host ISA bitmap */ static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; -#ifdef CONFIG_FPU -__ro_after_init DEFINE_STATIC_KEY_FALSE(cpu_hwcap_fpu); -#endif __ro_after_init DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX); EXPORT_SYMBOL(riscv_isa_ext_keys); @@ -239,8 +236,4 @@ void __init riscv_fill_hwcap(void) if (j >= 0) static_branch_enable(&riscv_isa_ext_keys[j]); } -#ifdef CONFIG_FPU - if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D)) - static_branch_enable(&cpu_hwcap_fpu); -#endif } -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-05-22 15:44 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-22 15:35 [PATCH v2 0/2] introduce unified static key mechanism for ISA ext Jisheng Zhang 2022-05-22 15:35 ` Jisheng Zhang 2022-05-22 15:35 ` [PATCH v2 1/2] riscv: introduce unified static key mechanism for ISA extensions Jisheng Zhang 2022-05-22 15:35 ` Jisheng Zhang 2022-05-23 14:42 ` Atish Patra 2022-05-23 14:42 ` Atish Patra 2022-05-23 15:07 ` Anup Patel 2022-05-23 15:07 ` Anup Patel 2022-05-22 15:35 ` Jisheng Zhang [this message] 2022-05-22 15:35 ` [PATCH v2 2/2] riscv: switch has_fpu() to the unified static key mechanism Jisheng Zhang 2022-05-23 14:41 ` Atish Patra 2022-05-23 14:41 ` Atish Patra 2022-05-23 15:08 ` Anup Patel 2022-05-23 15:08 ` Anup Patel 2022-06-16 22:04 ` [PATCH v2 0/2] introduce unified static key mechanism for ISA ext Palmer Dabbelt 2022-06-16 22:04 ` Palmer Dabbelt
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