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From: Marijn Suijten <marijn.suijten@somainline.org>
To: phone-devel@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@somainline.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Martin Botka <martin.botka@somainline.org>,
	Jami Kettunen <jami.kettunen@somainline.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>,
	Rajeev Nandan <quic_rajeevny@quicinc.com>,
	Vladimir Lypak <vladimir.lypak@gmail.com>,
	Arnd Bergmann <arnd@arndb.de>, Jonathan Marek <jonathan@marek.ca>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Subject: [PATCH v2 01/11] clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
Date: Thu,  2 Jun 2022 00:07:37 +0200	[thread overview]
Message-ID: <20220601220747.1145095-2-marijn.suijten@somainline.org> (raw)
In-Reply-To: <20220601220747.1145095-1-marijn.suijten@somainline.org>

Add the devres variant of clk_hw_register_divider_parent_hw() for
registering a divider clock with clk_hw parent pointer instead of parent
name.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 include/linux/clk-provider.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index c10dc4c659e2..4e07621849e6 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -831,6 +831,25 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
 	__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL,   \
 				  NULL, (flags), (reg), (shift), (width),     \
 				  (clk_divider_flags), NULL, (lock))
+/**
+ * devm_clk_hw_register_divider_parent_hw - register a divider clock with the clock framework
+ * @dev: device registering this clock
+ * @name: name of this clock
+ * @parent_hw: pointer to parent clk
+ * @flags: framework-specific flags
+ * @reg: register address to adjust divider
+ * @shift: number of bits to shift the bitfield
+ * @width: width of the bitfield
+ * @clk_divider_flags: divider-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+#define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags,   \
+					       reg, shift, width,	      \
+					       clk_divider_flags, lock)       \
+	__devm_clk_hw_register_divider((dev), NULL, (name), NULL,	      \
+				       (parent_hw), NULL, (flags), (reg),     \
+				       (shift), (width), (clk_divider_flags), \
+				       NULL, (lock))
 /**
  * devm_clk_hw_register_divider_table - register a table based divider clock
  * with the clock framework (devres variant)
-- 
2.36.1


WARNING: multiple messages have this Message-ID (diff)
From: Marijn Suijten <marijn.suijten@somainline.org>
To: phone-devel@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: freedreno@lists.freedesktop.org,
	Jonathan Marek <jonathan@marek.ca>, Arnd Bergmann <arnd@arndb.de>,
	Jami Kettunen <jami.kettunen@somainline.org>,
	Rajeev Nandan <quic_rajeevny@quicinc.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Vladimir Lypak <vladimir.lypak@gmail.com>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	David Airlie <airlied@linux.ie>,
	Martin Botka <martin.botka@somainline.org>,
	~postmarketos/upstreaming@lists.sr.ht,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@somainline.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	Sean Paul <sean@poorly.run>,
	linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: [PATCH v2 01/11] clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
Date: Thu,  2 Jun 2022 00:07:37 +0200	[thread overview]
Message-ID: <20220601220747.1145095-2-marijn.suijten@somainline.org> (raw)
In-Reply-To: <20220601220747.1145095-1-marijn.suijten@somainline.org>

Add the devres variant of clk_hw_register_divider_parent_hw() for
registering a divider clock with clk_hw parent pointer instead of parent
name.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 include/linux/clk-provider.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index c10dc4c659e2..4e07621849e6 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -831,6 +831,25 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
 	__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL,   \
 				  NULL, (flags), (reg), (shift), (width),     \
 				  (clk_divider_flags), NULL, (lock))
+/**
+ * devm_clk_hw_register_divider_parent_hw - register a divider clock with the clock framework
+ * @dev: device registering this clock
+ * @name: name of this clock
+ * @parent_hw: pointer to parent clk
+ * @flags: framework-specific flags
+ * @reg: register address to adjust divider
+ * @shift: number of bits to shift the bitfield
+ * @width: width of the bitfield
+ * @clk_divider_flags: divider-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+#define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags,   \
+					       reg, shift, width,	      \
+					       clk_divider_flags, lock)       \
+	__devm_clk_hw_register_divider((dev), NULL, (name), NULL,	      \
+				       (parent_hw), NULL, (flags), (reg),     \
+				       (shift), (width), (clk_divider_flags), \
+				       NULL, (lock))
 /**
  * devm_clk_hw_register_divider_table - register a table based divider clock
  * with the clock framework (devres variant)
-- 
2.36.1


  reply	other threads:[~2022-06-01 22:08 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-01 22:07 [PATCH v2 00/11] drm/msm/dsi_phy: Replace parent names with clk_hw pointers Marijn Suijten
2022-06-01 22:07 ` Marijn Suijten
2022-06-01 22:07 ` Marijn Suijten [this message]
2022-06-01 22:07   ` [PATCH v2 01/11] clk: divider: Introduce devm_clk_hw_register_divider_parent_hw() Marijn Suijten
2022-06-02 10:14   ` Dmitry Baryshkov
2022-06-02 10:14     ` Dmitry Baryshkov
2022-06-01 22:07 ` [PATCH v2 02/11] clk: mux: Introduce devm_clk_hw_register_mux_parent_hws() Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-02 10:15   ` Dmitry Baryshkov
2022-06-02 10:15     ` Dmitry Baryshkov
2022-06-01 22:07 ` [PATCH v2 03/11] clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw() Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-02 10:20   ` Dmitry Baryshkov
2022-06-02 10:20     ` Dmitry Baryshkov
2022-06-09 22:12     ` Stephen Boyd
2022-06-09 22:12       ` Stephen Boyd
2022-06-10  7:46       ` Marijn Suijten
2022-06-10  7:46         ` Marijn Suijten
2022-06-10 19:01         ` Stephen Boyd
2022-06-10 19:01           ` Stephen Boyd
2022-06-27 22:36           ` Marijn Suijten
2022-06-27 22:36             ` Marijn Suijten
2022-06-01 22:07 ` [PATCH v2 04/11] drm/msm/dsi/phy: Reindent and reflow multiline function calls Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-02 10:14   ` Dmitry Baryshkov
2022-06-02 10:14     ` Dmitry Baryshkov
2022-06-10  7:35     ` Marijn Suijten
2022-06-10  7:35       ` Marijn Suijten
2022-06-01 22:07 ` [PATCH v2 05/11] drm/msm/dsi_phy_28nm_8960: Use stack memory for temporary clock names Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-01 22:07 ` [PATCH v2 06/11] drm/msm/dsi/phy: Replace hardcoded char-array length with sizeof() Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-02  9:41   ` Dmitry Baryshkov
2022-06-02  9:41     ` Dmitry Baryshkov
2022-06-01 22:07 ` [PATCH v2 07/11] drm/msm/dsi_phy_28nm_8960: Replace parent names with clk_hw pointers Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-01 22:07 ` [PATCH v2 08/11] drm/msm/dsi_phy_28nm: " Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-02  9:41   ` Dmitry Baryshkov
2022-06-02  9:41     ` Dmitry Baryshkov
2022-06-01 22:07 ` [PATCH v2 09/11] drm/msm/dsi_phy_14nm: " Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-01 22:07 ` [PATCH v2 10/11] drm/msm/dsi_phy_10nm: " Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten
2022-06-01 22:07 ` [PATCH v2 11/11] drm/msm/dsi_phy_7nm: " Marijn Suijten
2022-06-01 22:07   ` Marijn Suijten

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