From: "Paweł Anikiel" <pan@semihalf.com> To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, amstan@chromium.org, upstream@semihalf.com, "Paweł Anikiel" <pan@semihalf.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org> Subject: [PATCH v4 4/5] ARM: dts: socfpga: Add Google Chameleon v3 devicetree Date: Fri, 3 Jun 2022 11:23:53 +0200 [thread overview] Message-ID: <20220603092354.141927-5-pan@semihalf.com> (raw) In-Reply-To: <20220603092354.141927-1-pan@semihalf.com> Add devicetree for the Google Chameleon v3 board. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_chameleonv3.dts | 90 +++++++++++++++++++ 2 files changed, 91 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 023c8b4ba45c..9417106d3289 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1146,6 +1146,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ + socfpga_arria10_chameleonv3.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts new file mode 100644 index 000000000000..422d00cd4c74 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; +#include "socfpga_arria10_mercury_aa1.dtsi" + +/ { + model = "Google Chameleon V3"; + compatible = "google,chameleon-v3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + serial0 = &uart0; + i2c0 = &i2c0; + i2c1 = &i2c1; + }; +}; + +&gmac0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + ssm2603: audio-codec@1a { + compatible = "adi,ssm2603"; + reg = <0x1a>; + }; +}; + +&i2c1 { + status = "okay"; + + u80: gpio@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SOM_AUD_MUTE", + "DP1_OUT_CEC_EN", + "DP2_OUT_CEC_EN", + "DP1_SOM_PS8469_CAD", + "DPD_SOM_PS8469_CAD", + "DP_OUT_PWR_EN", + "STM32_RST_L", + "STM32_BOOT0", + + "FPGA_PROT", + "STM32_FPGA_COMM0", + "TP119", + "TP120", + "TP121", + "TP122", + "TP123", + "TP124"; + }; +}; + +&mmc { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; -- 2.36.1.255.ge46751e96f-goog
WARNING: multiple messages have this Message-ID (diff)
From: "Paweł Anikiel" <pan@semihalf.com> To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, amstan@chromium.org, upstream@semihalf.com, "Paweł Anikiel" <pan@semihalf.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org> Subject: [PATCH v4 4/5] ARM: dts: socfpga: Add Google Chameleon v3 devicetree Date: Fri, 3 Jun 2022 11:23:53 +0200 [thread overview] Message-ID: <20220603092354.141927-5-pan@semihalf.com> (raw) In-Reply-To: <20220603092354.141927-1-pan@semihalf.com> Add devicetree for the Google Chameleon v3 board. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/socfpga_arria10_chameleonv3.dts | 90 +++++++++++++++++++ 2 files changed, 91 insertions(+) create mode 100644 arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 023c8b4ba45c..9417106d3289 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1146,6 +1146,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-torbreck.dtb dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ + socfpga_arria10_chameleonv3.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts new file mode 100644 index 000000000000..422d00cd4c74 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; +#include "socfpga_arria10_mercury_aa1.dtsi" + +/ { + model = "Google Chameleon V3"; + compatible = "google,chameleon-v3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + serial0 = &uart0; + i2c0 = &i2c0; + i2c1 = &i2c1; + }; +}; + +&gmac0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + ssm2603: audio-codec@1a { + compatible = "adi,ssm2603"; + reg = <0x1a>; + }; +}; + +&i2c1 { + status = "okay"; + + u80: gpio@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SOM_AUD_MUTE", + "DP1_OUT_CEC_EN", + "DP2_OUT_CEC_EN", + "DP1_SOM_PS8469_CAD", + "DPD_SOM_PS8469_CAD", + "DP_OUT_PWR_EN", + "STM32_RST_L", + "STM32_BOOT0", + + "FPGA_PROT", + "STM32_FPGA_COMM0", + "TP119", + "TP120", + "TP121", + "TP122", + "TP123", + "TP124"; + }; +}; + +&mmc { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; -- 2.36.1.255.ge46751e96f-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-06-03 9:25 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-03 9:23 [PATCH v4 0/5] Add Chameleon v3 devicetree Paweł Anikiel 2022-06-03 9:23 ` Paweł Anikiel 2022-06-03 9:23 ` [PATCH v4 1/5] ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi Paweł Anikiel 2022-06-03 9:23 ` Paweł Anikiel 2022-06-03 9:23 ` [PATCH v4 2/5] ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts Paweł Anikiel 2022-06-03 9:23 ` Paweł Anikiel 2022-06-03 9:23 ` [PATCH v4 3/5] ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts Paweł Anikiel 2022-06-03 9:23 ` Paweł Anikiel 2022-06-03 9:23 ` Paweł Anikiel [this message] 2022-06-03 9:23 ` [PATCH v4 4/5] ARM: dts: socfpga: Add Google Chameleon v3 devicetree Paweł Anikiel 2022-06-03 9:23 ` [PATCH v4 5/5] dt-bindings: altera: Add Chameleon v3 board Paweł Anikiel 2022-06-03 9:23 ` Paweł Anikiel 2022-06-03 10:18 ` Krzysztof Kozlowski 2022-06-03 10:18 ` Krzysztof Kozlowski 2022-06-14 15:47 ` [PATCH v4 0/5] Add Chameleon v3 devicetree Dinh Nguyen 2022-06-14 15:47 ` Dinh Nguyen
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