From: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
To: <arnd@arndb.de>, <alexandre.belloni@bootlin.com>,
<krzysztof.kozlowski+dt@linaro.org>,
<Nicolas.Ferre@microchip.com>, <claudiu.beznea@microchip.com>
Cc: <soc@kernel.org>, <robh+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<UNGLinuxDriver@microchip.com>
Subject: [PATCH v2] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
Date: Mon, 4 Jul 2022 11:58:09 -0200 [thread overview]
Message-ID: <20220704135809.6952-1-kavyasree.kotagiri@microchip.com> (raw)
On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
---
v1 -> v2:
- Keep both tx and rx pins into one node.
arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++--------------
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index 3c7e3a7d6f14..d56d2054c38d 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -19,19 +19,9 @@ aliases {
};
&gpio {
- fc_shrd7_pins: fc_shrd7-pins {
- pins = "GPIO_49";
- function = "fc_shrd7";
- };
-
- fc_shrd8_pins: fc_shrd8-pins {
- pins = "GPIO_54";
- function = "fc_shrd8";
- };
-
- fc3_b_pins: fcb3-spi-pins {
- /* SCK, RXD, TXD */
- pins = "GPIO_51", "GPIO_52", "GPIO_53";
+ fc3_b_pins: fc3-b-pins {
+ /* RX, TX */
+ pins = "GPIO_52", "GPIO_53";
function = "fc3_b";
};
@@ -53,7 +43,7 @@ &flx3 {
status = "okay";
usart3: serial@200 {
- pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
+ pinctrl-0 = <&fc3_b_pins>;
pinctrl-names = "default";
status = "okay";
};
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
To: <arnd@arndb.de>, <alexandre.belloni@bootlin.com>,
<krzysztof.kozlowski+dt@linaro.org>,
<Nicolas.Ferre@microchip.com>, <claudiu.beznea@microchip.com>
Cc: <soc@kernel.org>, <robh+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<UNGLinuxDriver@microchip.com>
Subject: [PATCH v2] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
Date: Mon, 4 Jul 2022 11:58:09 -0200 [thread overview]
Message-ID: <20220704135809.6952-1-kavyasree.kotagiri@microchip.com> (raw)
On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
---
v1 -> v2:
- Keep both tx and rx pins into one node.
arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++--------------
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index 3c7e3a7d6f14..d56d2054c38d 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -19,19 +19,9 @@ aliases {
};
&gpio {
- fc_shrd7_pins: fc_shrd7-pins {
- pins = "GPIO_49";
- function = "fc_shrd7";
- };
-
- fc_shrd8_pins: fc_shrd8-pins {
- pins = "GPIO_54";
- function = "fc_shrd8";
- };
-
- fc3_b_pins: fcb3-spi-pins {
- /* SCK, RXD, TXD */
- pins = "GPIO_51", "GPIO_52", "GPIO_53";
+ fc3_b_pins: fc3-b-pins {
+ /* RX, TX */
+ pins = "GPIO_52", "GPIO_53";
function = "fc3_b";
};
@@ -53,7 +43,7 @@ &flx3 {
status = "okay";
usart3: serial@200 {
- pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
+ pinctrl-0 = <&fc3_b_pins>;
pinctrl-names = "default";
status = "okay";
};
--
2.25.1
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next reply other threads:[~2022-07-04 13:58 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 13:58 Kavyasree Kotagiri [this message]
2022-07-04 13:58 ` [PATCH v2] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings Kavyasree Kotagiri
2022-07-04 14:06 ` Nicolas Ferre
2022-07-04 14:06 ` Nicolas Ferre
2022-07-05 7:41 ` Claudiu.Beznea
2022-07-05 7:41 ` Claudiu.Beznea
2022-07-06 12:00 ` patchwork-bot+linux-soc
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