From: kernel test robot <lkp@intel.com>
To: Sean Anderson <sean.anderson@seco.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Madalin Bucur <madalin.bucur@nxp.com>,
netdev@vger.kernel.org
Cc: kbuild-all@lists.01.org, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>,
linux-arm-kernel@lists.infradead.org,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org,
Sean Anderson <sean.anderson@seco.com>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Jonathan Corbet <corbet@lwn.net>,
Kishon Vijay Abraham I <kishon@ti.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver
Date: Sun, 17 Jul 2022 06:39:43 +0800 [thread overview]
Message-ID: <202207170654.0sfLE3ua-lkp@intel.com> (raw)
In-Reply-To: <20220715215954.1449214-7-sean.anderson@seco.com>
Hi Sean,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url: https://github.com/intel-lab-lkp/linux/commits/Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 2acd1022549e210edc4cfc9fc65b07b88751f0d9
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220717/202207170654.0sfLE3ua-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/fbc22d79121541a0f957e0c209810c37570041b5
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
git checkout fbc22d79121541a0f957e0c209810c37570041b5
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_recalc_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:211:25: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]
211 | u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
| ^~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_set_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:294:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
294 | cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
| ^~~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_clk_init':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:404:9: error: implicit declaration of function 'kfree'; did you mean 'vfree'? [-Werror=implicit-function-declaration]
404 | kfree(ref_name);
| ^~~~~
| vfree
cc1: some warnings being treated as errors
vim +/FIELD_GET +211 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
205
206 static unsigned long lynx_pll_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208 {
209 struct lynx_clk *clk = lynx_pll_to_clk(hw);
210 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
> 211 u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
212 u32 rfclk_sel = FIELD_GET(PLLaCR0_RFCLK_SEL, cr0);
213 unsigned long ret;
214
215 dev_dbg(clk->dev, "%s(pll%d, %lu)\n", __func__,
216 clk->idx, parent_rate);
217
218 ret = mult_frac(parent_rate, lynx_pll_ratio(frate_sel, rfclk_sel),
219 HZ_PER_KHZ);
220 return ret;
221 }
222
223 static long lynx_pll_round_rate(struct clk_hw *hw, unsigned long rate_khz,
224 unsigned long *parent_rate)
225 {
226 int frate_sel, rfclk_sel;
227 struct lynx_clk *clk = lynx_pll_to_clk(hw);
228 u32 ratio;
229
230 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
231 clk->idx, rate_khz, *parent_rate);
232
233 frate_sel = lynx_frate_to_sel(rate_khz);
234 if (frate_sel < 0)
235 return frate_sel;
236
237 rfclk_sel = lynx_rfclk_to_sel(*parent_rate);
238 if (rfclk_sel >= 0) {
239 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
240 if (ratio)
241 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
242 }
243
244 for (rfclk_sel = 0;
245 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
246 rfclk_sel++) {
247 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
248 if (ratio) {
249 *parent_rate = rfclk_sel_map[rfclk_sel];
250 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
251 }
252 }
253
254 return -EINVAL;
255 }
256
257 static int lynx_pll_set_rate(struct clk_hw *hw, unsigned long rate_khz,
258 unsigned long parent_rate)
259 {
260 int frate_sel, rfclk_sel, ret;
261 struct lynx_clk *clk = lynx_pll_to_clk(hw);
262 u32 ratio, cr0 = lynx_read(clk, PLLaCR0(clk->idx));
263
264 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
265 clk->idx, rate_khz, parent_rate);
266
267 frate_sel = lynx_frate_to_sel(rate_khz);
268 if (frate_sel < 0)
269 return frate_sel;
270
271 /* First try the existing rate */
272 rfclk_sel = lynx_rfclk_to_sel(parent_rate);
273 if (rfclk_sel >= 0) {
274 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
275 if (ratio)
276 goto got_rfclk;
277 }
278
279 for (rfclk_sel = 0;
280 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
281 rfclk_sel++) {
282 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
283 if (ratio) {
284 ret = clk_set_rate(clk->ref, rfclk_sel_map[rfclk_sel]);
285 if (!ret)
286 goto got_rfclk;
287 }
288 }
289
290 return ret;
291
292 got_rfclk:
293 cr0 &= ~(PLLaCR0_RFCLK_SEL | PLLaCR0_FRATE_SEL);
> 294 cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
295 cr0 |= FIELD_PREP(PLLaCR0_FRATE_SEL, frate_sel);
296 lynx_write(clk, cr0, PLLaCR0(clk->idx));
297 return 0;
298 }
299
300 static const struct clk_ops lynx_pll_clk_ops = {
301 .prepare = lynx_pll_prepare,
302 .disable = lynx_pll_disable,
303 .is_enabled = lynx_pll_is_enabled,
304 .recalc_rate = lynx_pll_recalc_rate,
305 .round_rate = lynx_pll_round_rate,
306 .set_rate = lynx_pll_set_rate,
307 };
308
309 static void lynx_ex_dly_disable(struct clk_hw *hw)
310 {
311 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
312 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
313
314 cr0 &= ~PLLaCR0_DLYDIV_SEL;
315 lynx_write(clk, PLLaCR0(clk->idx), cr0);
316 }
317
318 static int lynx_ex_dly_enable(struct clk_hw *hw)
319 {
320 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
321 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
322
323 cr0 &= ~PLLaCR0_DLYDIV_SEL;
324 cr0 |= FIELD_PREP(PLLaCR0_DLYDIV_SEL, PLLaCR0_DLYDIV_SEL_16);
325 lynx_write(clk, PLLaCR0(clk->idx), cr0);
326 return 0;
327 }
328
329 static int lynx_ex_dly_is_enabled(struct clk_hw *hw)
330 {
331 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
332
333 return lynx_read(clk, PLLaCR0(clk->idx)) & PLLaCR0_DLYDIV_SEL;
334 }
335
336 static unsigned long lynx_ex_dly_recalc_rate(struct clk_hw *hw,
337 unsigned long parent_rate)
338 {
339 return parent_rate / 16;
340 }
341
342 static const struct clk_ops lynx_ex_dly_clk_ops = {
343 .enable = lynx_ex_dly_enable,
344 .disable = lynx_ex_dly_disable,
345 .is_enabled = lynx_ex_dly_is_enabled,
346 .recalc_rate = lynx_ex_dly_recalc_rate,
347 };
348
349 static int lynx_clk_init(struct lynx_clk *clk, struct device *dev,
350 struct regmap *regmap, unsigned int index)
351 {
352 const struct clk_hw *pll_parents, *ex_dly_parents;
353 struct clk_init_data pll_init = {
354 .ops = &lynx_pll_clk_ops,
355 .parent_hws = &pll_parents,
356 .num_parents = 1,
357 .flags = CLK_SET_RATE_GATE | CLK_GET_RATE_NOCACHE |
358 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
359 };
360 struct clk_init_data ex_dly_init = {
361 .ops = &lynx_ex_dly_clk_ops,
362 .parent_hws = &ex_dly_parents,
363 .num_parents = 1,
364 };
365 char *ref_name;
366 int ret;
367
368 clk->dev = dev;
369 clk->regmap = regmap;
370 clk->idx = index;
371
372 ref_name = kasprintf(GFP_KERNEL, "ref%d", index);
373 pll_init.name = kasprintf(GFP_KERNEL, "%s.pll%d", dev_name(dev), index);
374 ex_dly_init.name = kasprintf(GFP_KERNEL, "%s_ex_dly", pll_init.name);
375 if (!ref_name || !pll_init.name || !ex_dly_init.name) {
376 ret = -ENOMEM;
377 goto out;
378 }
379
380 clk->ref = devm_clk_get(dev, ref_name);
381 if (IS_ERR(clk->ref)) {
382 ret = PTR_ERR(clk->ref);
383 dev_err_probe(dev, ret, "could not get %s\n", ref_name);
384 goto out;
385 }
386
387 pll_parents = __clk_get_hw(clk->ref);
388 clk->pll.init = &pll_init;
389 ret = devm_clk_hw_register(dev, &clk->pll);
390 if (ret) {
391 dev_err_probe(dev, ret, "could not register %s\n",
392 pll_init.name);
393 goto out;
394 }
395
396 ex_dly_parents = &clk->pll;
397 clk->ex_dly.init = &ex_dly_init;
398 ret = devm_clk_hw_register(dev, &clk->ex_dly);
399 if (ret)
400 dev_err_probe(dev, ret, "could not register %s\n",
401 ex_dly_init.name);
402
403 out:
> 404 kfree(ref_name);
405 kfree(pll_init.name);
406 kfree(ex_dly_init.name);
407 return ret;
408 }
409
--
0-DAY CI Kernel Test Service
https://01.org/lkp
WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: Sean Anderson <sean.anderson@seco.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Madalin Bucur <madalin.bucur@nxp.com>,
netdev@vger.kernel.org
Cc: kbuild-all@lists.01.org, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>,
linux-arm-kernel@lists.infradead.org,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org,
Sean Anderson <sean.anderson@seco.com>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Jonathan Corbet <corbet@lwn.net>,
Kishon Vijay Abraham I <kishon@ti.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver
Date: Sun, 17 Jul 2022 06:39:43 +0800 [thread overview]
Message-ID: <202207170654.0sfLE3ua-lkp@intel.com> (raw)
In-Reply-To: <20220715215954.1449214-7-sean.anderson@seco.com>
Hi Sean,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url: https://github.com/intel-lab-lkp/linux/commits/Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 2acd1022549e210edc4cfc9fc65b07b88751f0d9
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220717/202207170654.0sfLE3ua-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/fbc22d79121541a0f957e0c209810c37570041b5
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
git checkout fbc22d79121541a0f957e0c209810c37570041b5
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_recalc_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:211:25: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]
211 | u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
| ^~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_set_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:294:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
294 | cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
| ^~~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_clk_init':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:404:9: error: implicit declaration of function 'kfree'; did you mean 'vfree'? [-Werror=implicit-function-declaration]
404 | kfree(ref_name);
| ^~~~~
| vfree
cc1: some warnings being treated as errors
vim +/FIELD_GET +211 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
205
206 static unsigned long lynx_pll_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208 {
209 struct lynx_clk *clk = lynx_pll_to_clk(hw);
210 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
> 211 u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
212 u32 rfclk_sel = FIELD_GET(PLLaCR0_RFCLK_SEL, cr0);
213 unsigned long ret;
214
215 dev_dbg(clk->dev, "%s(pll%d, %lu)\n", __func__,
216 clk->idx, parent_rate);
217
218 ret = mult_frac(parent_rate, lynx_pll_ratio(frate_sel, rfclk_sel),
219 HZ_PER_KHZ);
220 return ret;
221 }
222
223 static long lynx_pll_round_rate(struct clk_hw *hw, unsigned long rate_khz,
224 unsigned long *parent_rate)
225 {
226 int frate_sel, rfclk_sel;
227 struct lynx_clk *clk = lynx_pll_to_clk(hw);
228 u32 ratio;
229
230 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
231 clk->idx, rate_khz, *parent_rate);
232
233 frate_sel = lynx_frate_to_sel(rate_khz);
234 if (frate_sel < 0)
235 return frate_sel;
236
237 rfclk_sel = lynx_rfclk_to_sel(*parent_rate);
238 if (rfclk_sel >= 0) {
239 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
240 if (ratio)
241 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
242 }
243
244 for (rfclk_sel = 0;
245 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
246 rfclk_sel++) {
247 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
248 if (ratio) {
249 *parent_rate = rfclk_sel_map[rfclk_sel];
250 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
251 }
252 }
253
254 return -EINVAL;
255 }
256
257 static int lynx_pll_set_rate(struct clk_hw *hw, unsigned long rate_khz,
258 unsigned long parent_rate)
259 {
260 int frate_sel, rfclk_sel, ret;
261 struct lynx_clk *clk = lynx_pll_to_clk(hw);
262 u32 ratio, cr0 = lynx_read(clk, PLLaCR0(clk->idx));
263
264 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
265 clk->idx, rate_khz, parent_rate);
266
267 frate_sel = lynx_frate_to_sel(rate_khz);
268 if (frate_sel < 0)
269 return frate_sel;
270
271 /* First try the existing rate */
272 rfclk_sel = lynx_rfclk_to_sel(parent_rate);
273 if (rfclk_sel >= 0) {
274 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
275 if (ratio)
276 goto got_rfclk;
277 }
278
279 for (rfclk_sel = 0;
280 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
281 rfclk_sel++) {
282 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
283 if (ratio) {
284 ret = clk_set_rate(clk->ref, rfclk_sel_map[rfclk_sel]);
285 if (!ret)
286 goto got_rfclk;
287 }
288 }
289
290 return ret;
291
292 got_rfclk:
293 cr0 &= ~(PLLaCR0_RFCLK_SEL | PLLaCR0_FRATE_SEL);
> 294 cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
295 cr0 |= FIELD_PREP(PLLaCR0_FRATE_SEL, frate_sel);
296 lynx_write(clk, cr0, PLLaCR0(clk->idx));
297 return 0;
298 }
299
300 static const struct clk_ops lynx_pll_clk_ops = {
301 .prepare = lynx_pll_prepare,
302 .disable = lynx_pll_disable,
303 .is_enabled = lynx_pll_is_enabled,
304 .recalc_rate = lynx_pll_recalc_rate,
305 .round_rate = lynx_pll_round_rate,
306 .set_rate = lynx_pll_set_rate,
307 };
308
309 static void lynx_ex_dly_disable(struct clk_hw *hw)
310 {
311 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
312 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
313
314 cr0 &= ~PLLaCR0_DLYDIV_SEL;
315 lynx_write(clk, PLLaCR0(clk->idx), cr0);
316 }
317
318 static int lynx_ex_dly_enable(struct clk_hw *hw)
319 {
320 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
321 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
322
323 cr0 &= ~PLLaCR0_DLYDIV_SEL;
324 cr0 |= FIELD_PREP(PLLaCR0_DLYDIV_SEL, PLLaCR0_DLYDIV_SEL_16);
325 lynx_write(clk, PLLaCR0(clk->idx), cr0);
326 return 0;
327 }
328
329 static int lynx_ex_dly_is_enabled(struct clk_hw *hw)
330 {
331 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
332
333 return lynx_read(clk, PLLaCR0(clk->idx)) & PLLaCR0_DLYDIV_SEL;
334 }
335
336 static unsigned long lynx_ex_dly_recalc_rate(struct clk_hw *hw,
337 unsigned long parent_rate)
338 {
339 return parent_rate / 16;
340 }
341
342 static const struct clk_ops lynx_ex_dly_clk_ops = {
343 .enable = lynx_ex_dly_enable,
344 .disable = lynx_ex_dly_disable,
345 .is_enabled = lynx_ex_dly_is_enabled,
346 .recalc_rate = lynx_ex_dly_recalc_rate,
347 };
348
349 static int lynx_clk_init(struct lynx_clk *clk, struct device *dev,
350 struct regmap *regmap, unsigned int index)
351 {
352 const struct clk_hw *pll_parents, *ex_dly_parents;
353 struct clk_init_data pll_init = {
354 .ops = &lynx_pll_clk_ops,
355 .parent_hws = &pll_parents,
356 .num_parents = 1,
357 .flags = CLK_SET_RATE_GATE | CLK_GET_RATE_NOCACHE |
358 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
359 };
360 struct clk_init_data ex_dly_init = {
361 .ops = &lynx_ex_dly_clk_ops,
362 .parent_hws = &ex_dly_parents,
363 .num_parents = 1,
364 };
365 char *ref_name;
366 int ret;
367
368 clk->dev = dev;
369 clk->regmap = regmap;
370 clk->idx = index;
371
372 ref_name = kasprintf(GFP_KERNEL, "ref%d", index);
373 pll_init.name = kasprintf(GFP_KERNEL, "%s.pll%d", dev_name(dev), index);
374 ex_dly_init.name = kasprintf(GFP_KERNEL, "%s_ex_dly", pll_init.name);
375 if (!ref_name || !pll_init.name || !ex_dly_init.name) {
376 ret = -ENOMEM;
377 goto out;
378 }
379
380 clk->ref = devm_clk_get(dev, ref_name);
381 if (IS_ERR(clk->ref)) {
382 ret = PTR_ERR(clk->ref);
383 dev_err_probe(dev, ret, "could not get %s\n", ref_name);
384 goto out;
385 }
386
387 pll_parents = __clk_get_hw(clk->ref);
388 clk->pll.init = &pll_init;
389 ret = devm_clk_hw_register(dev, &clk->pll);
390 if (ret) {
391 dev_err_probe(dev, ret, "could not register %s\n",
392 pll_init.name);
393 goto out;
394 }
395
396 ex_dly_parents = &clk->pll;
397 clk->ex_dly.init = &ex_dly_init;
398 ret = devm_clk_hw_register(dev, &clk->ex_dly);
399 if (ret)
400 dev_err_probe(dev, ret, "could not register %s\n",
401 ex_dly_init.name);
402
403 out:
> 404 kfree(ref_name);
405 kfree(pll_init.name);
406 kfree(ex_dly_init.name);
407 return ret;
408 }
409
--
0-DAY CI Kernel Test Service
https://01.org/lkp
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: Sean Anderson <sean.anderson@seco.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Madalin Bucur <madalin.bucur@nxp.com>,
netdev@vger.kernel.org
Cc: kbuild-all@lists.01.org, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>,
linux-arm-kernel@lists.infradead.org,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org,
Sean Anderson <sean.anderson@seco.com>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Jonathan Corbet <corbet@lwn.net>,
Kishon Vijay Abraham I <kishon@ti.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Vinod Koul <vkoul@kernel.org>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver
Date: Sun, 17 Jul 2022 06:39:43 +0800 [thread overview]
Message-ID: <202207170654.0sfLE3ua-lkp@intel.com> (raw)
In-Reply-To: <20220715215954.1449214-7-sean.anderson@seco.com>
Hi Sean,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url: https://github.com/intel-lab-lkp/linux/commits/Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 2acd1022549e210edc4cfc9fc65b07b88751f0d9
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220717/202207170654.0sfLE3ua-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/fbc22d79121541a0f957e0c209810c37570041b5
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sean-Anderson/net-dpaa-Convert-to-phylink/20220717-002036
git checkout fbc22d79121541a0f957e0c209810c37570041b5
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_recalc_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:211:25: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]
211 | u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
| ^~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_pll_set_rate':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:294:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
294 | cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
| ^~~~~~~~~~
drivers/phy/freescale/phy-fsl-lynx-10g-clk.c: In function 'lynx_clk_init':
>> drivers/phy/freescale/phy-fsl-lynx-10g-clk.c:404:9: error: implicit declaration of function 'kfree'; did you mean 'vfree'? [-Werror=implicit-function-declaration]
404 | kfree(ref_name);
| ^~~~~
| vfree
cc1: some warnings being treated as errors
vim +/FIELD_GET +211 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
205
206 static unsigned long lynx_pll_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208 {
209 struct lynx_clk *clk = lynx_pll_to_clk(hw);
210 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
> 211 u32 frate_sel = FIELD_GET(PLLaCR0_FRATE_SEL, cr0);
212 u32 rfclk_sel = FIELD_GET(PLLaCR0_RFCLK_SEL, cr0);
213 unsigned long ret;
214
215 dev_dbg(clk->dev, "%s(pll%d, %lu)\n", __func__,
216 clk->idx, parent_rate);
217
218 ret = mult_frac(parent_rate, lynx_pll_ratio(frate_sel, rfclk_sel),
219 HZ_PER_KHZ);
220 return ret;
221 }
222
223 static long lynx_pll_round_rate(struct clk_hw *hw, unsigned long rate_khz,
224 unsigned long *parent_rate)
225 {
226 int frate_sel, rfclk_sel;
227 struct lynx_clk *clk = lynx_pll_to_clk(hw);
228 u32 ratio;
229
230 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
231 clk->idx, rate_khz, *parent_rate);
232
233 frate_sel = lynx_frate_to_sel(rate_khz);
234 if (frate_sel < 0)
235 return frate_sel;
236
237 rfclk_sel = lynx_rfclk_to_sel(*parent_rate);
238 if (rfclk_sel >= 0) {
239 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
240 if (ratio)
241 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
242 }
243
244 for (rfclk_sel = 0;
245 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
246 rfclk_sel++) {
247 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
248 if (ratio) {
249 *parent_rate = rfclk_sel_map[rfclk_sel];
250 return mult_frac(*parent_rate, ratio, HZ_PER_KHZ);
251 }
252 }
253
254 return -EINVAL;
255 }
256
257 static int lynx_pll_set_rate(struct clk_hw *hw, unsigned long rate_khz,
258 unsigned long parent_rate)
259 {
260 int frate_sel, rfclk_sel, ret;
261 struct lynx_clk *clk = lynx_pll_to_clk(hw);
262 u32 ratio, cr0 = lynx_read(clk, PLLaCR0(clk->idx));
263
264 dev_dbg(clk->dev, "%s(pll%d, %lu, %lu)\n", __func__,
265 clk->idx, rate_khz, parent_rate);
266
267 frate_sel = lynx_frate_to_sel(rate_khz);
268 if (frate_sel < 0)
269 return frate_sel;
270
271 /* First try the existing rate */
272 rfclk_sel = lynx_rfclk_to_sel(parent_rate);
273 if (rfclk_sel >= 0) {
274 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
275 if (ratio)
276 goto got_rfclk;
277 }
278
279 for (rfclk_sel = 0;
280 rfclk_sel < ARRAY_SIZE(rfclk_sel_map);
281 rfclk_sel++) {
282 ratio = lynx_pll_ratio(frate_sel, rfclk_sel);
283 if (ratio) {
284 ret = clk_set_rate(clk->ref, rfclk_sel_map[rfclk_sel]);
285 if (!ret)
286 goto got_rfclk;
287 }
288 }
289
290 return ret;
291
292 got_rfclk:
293 cr0 &= ~(PLLaCR0_RFCLK_SEL | PLLaCR0_FRATE_SEL);
> 294 cr0 |= FIELD_PREP(PLLaCR0_RFCLK_SEL, rfclk_sel);
295 cr0 |= FIELD_PREP(PLLaCR0_FRATE_SEL, frate_sel);
296 lynx_write(clk, cr0, PLLaCR0(clk->idx));
297 return 0;
298 }
299
300 static const struct clk_ops lynx_pll_clk_ops = {
301 .prepare = lynx_pll_prepare,
302 .disable = lynx_pll_disable,
303 .is_enabled = lynx_pll_is_enabled,
304 .recalc_rate = lynx_pll_recalc_rate,
305 .round_rate = lynx_pll_round_rate,
306 .set_rate = lynx_pll_set_rate,
307 };
308
309 static void lynx_ex_dly_disable(struct clk_hw *hw)
310 {
311 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
312 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
313
314 cr0 &= ~PLLaCR0_DLYDIV_SEL;
315 lynx_write(clk, PLLaCR0(clk->idx), cr0);
316 }
317
318 static int lynx_ex_dly_enable(struct clk_hw *hw)
319 {
320 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
321 u32 cr0 = lynx_read(clk, PLLaCR0(clk->idx));
322
323 cr0 &= ~PLLaCR0_DLYDIV_SEL;
324 cr0 |= FIELD_PREP(PLLaCR0_DLYDIV_SEL, PLLaCR0_DLYDIV_SEL_16);
325 lynx_write(clk, PLLaCR0(clk->idx), cr0);
326 return 0;
327 }
328
329 static int lynx_ex_dly_is_enabled(struct clk_hw *hw)
330 {
331 struct lynx_clk *clk = lynx_ex_dly_to_clk(hw);
332
333 return lynx_read(clk, PLLaCR0(clk->idx)) & PLLaCR0_DLYDIV_SEL;
334 }
335
336 static unsigned long lynx_ex_dly_recalc_rate(struct clk_hw *hw,
337 unsigned long parent_rate)
338 {
339 return parent_rate / 16;
340 }
341
342 static const struct clk_ops lynx_ex_dly_clk_ops = {
343 .enable = lynx_ex_dly_enable,
344 .disable = lynx_ex_dly_disable,
345 .is_enabled = lynx_ex_dly_is_enabled,
346 .recalc_rate = lynx_ex_dly_recalc_rate,
347 };
348
349 static int lynx_clk_init(struct lynx_clk *clk, struct device *dev,
350 struct regmap *regmap, unsigned int index)
351 {
352 const struct clk_hw *pll_parents, *ex_dly_parents;
353 struct clk_init_data pll_init = {
354 .ops = &lynx_pll_clk_ops,
355 .parent_hws = &pll_parents,
356 .num_parents = 1,
357 .flags = CLK_SET_RATE_GATE | CLK_GET_RATE_NOCACHE |
358 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
359 };
360 struct clk_init_data ex_dly_init = {
361 .ops = &lynx_ex_dly_clk_ops,
362 .parent_hws = &ex_dly_parents,
363 .num_parents = 1,
364 };
365 char *ref_name;
366 int ret;
367
368 clk->dev = dev;
369 clk->regmap = regmap;
370 clk->idx = index;
371
372 ref_name = kasprintf(GFP_KERNEL, "ref%d", index);
373 pll_init.name = kasprintf(GFP_KERNEL, "%s.pll%d", dev_name(dev), index);
374 ex_dly_init.name = kasprintf(GFP_KERNEL, "%s_ex_dly", pll_init.name);
375 if (!ref_name || !pll_init.name || !ex_dly_init.name) {
376 ret = -ENOMEM;
377 goto out;
378 }
379
380 clk->ref = devm_clk_get(dev, ref_name);
381 if (IS_ERR(clk->ref)) {
382 ret = PTR_ERR(clk->ref);
383 dev_err_probe(dev, ret, "could not get %s\n", ref_name);
384 goto out;
385 }
386
387 pll_parents = __clk_get_hw(clk->ref);
388 clk->pll.init = &pll_init;
389 ret = devm_clk_hw_register(dev, &clk->pll);
390 if (ret) {
391 dev_err_probe(dev, ret, "could not register %s\n",
392 pll_init.name);
393 goto out;
394 }
395
396 ex_dly_parents = &clk->pll;
397 clk->ex_dly.init = &ex_dly_init;
398 ret = devm_clk_hw_register(dev, &clk->ex_dly);
399 if (ret)
400 dev_err_probe(dev, ret, "could not register %s\n",
401 ex_dly_init.name);
402
403 out:
> 404 kfree(ref_name);
405 kfree(pll_init.name);
406 kfree(ex_dly_init.name);
407 return ret;
408 }
409
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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next prev parent reply other threads:[~2022-07-16 22:40 UTC|newest]
Thread overview: 278+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 21:59 [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 01/47] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-20 22:17 ` Rob Herring
2022-07-20 22:17 ` Rob Herring
2022-07-20 22:17 ` Rob Herring
2022-07-21 16:05 ` Sean Anderson
2022-07-21 16:05 ` Sean Anderson
2022-07-21 16:05 ` Sean Anderson
2022-07-21 18:29 ` Rob Herring
2022-07-21 18:29 ` Rob Herring
2022-07-21 18:29 ` Rob Herring
2022-07-21 23:35 ` Sean Anderson
2022-07-21 23:35 ` Sean Anderson
2022-07-21 23:35 ` Sean Anderson
2022-07-26 15:44 ` Sean Anderson
2022-07-26 15:44 ` Sean Anderson
2022-07-26 15:44 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 02/47] dt-bindings: net: Expand pcs-handle to an array Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 03/47] dt-bindings: net: Convert FMan MAC bindings to yaml Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 23:06 ` Rob Herring
2022-07-15 23:06 ` Rob Herring
2022-07-16 22:47 ` Sean Anderson
2022-07-16 22:47 ` Sean Anderson
2022-07-21 14:42 ` Krzysztof Kozlowski
2022-07-21 14:42 ` Krzysztof Kozlowski
2022-07-22 16:50 ` Sean Anderson
2022-07-22 16:50 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 04/47] dt-bindings: net: fman: Add additional interface properties Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 05/47] net: phy: Add 1000BASE-KX interface mode Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 06/47] [RFT] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 22:39 ` kernel test robot [this message]
2022-07-16 22:39 ` kernel test robot
2022-07-16 22:39 ` kernel test robot
2022-07-15 21:59 ` [PATCH net-next v3 07/47] net: phy: Add support for rate adaptation Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 19:39 ` Andrew Lunn
2022-07-16 19:39 ` Andrew Lunn
2022-07-16 21:55 ` Sean Anderson
2022-07-16 21:55 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 08/47] net: phylink: Support differing link speeds and interface speeds Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 20:06 ` Andrew Lunn
2022-07-16 20:06 ` Andrew Lunn
2022-07-16 22:29 ` Sean Anderson
2022-07-16 22:29 ` Sean Anderson
2022-07-17 1:26 ` Andrew Lunn
2022-07-17 1:26 ` Andrew Lunn
2022-07-18 15:49 ` Sean Anderson
2022-07-18 15:49 ` Sean Anderson
2022-07-18 16:06 ` Russell King (Oracle)
2022-07-18 16:06 ` Russell King (Oracle)
2022-07-18 16:38 ` Sean Anderson
2022-07-18 16:38 ` Sean Anderson
2022-07-18 17:28 ` Andrew Lunn
2022-07-18 17:28 ` Andrew Lunn
2022-07-18 17:40 ` Sean Anderson
2022-07-18 17:40 ` Sean Anderson
2022-07-18 18:01 ` Russell King (Oracle)
2022-07-18 18:01 ` Russell King (Oracle)
2022-07-15 21:59 ` [PATCH net-next v3 09/47] net: phylink: Adjust advertisement based on rate adaptation Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 10/47] net: phylink: Adjust link settings " Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 20:17 ` Andrew Lunn
2022-07-16 20:17 ` Andrew Lunn
2022-07-16 22:37 ` Sean Anderson
2022-07-16 22:37 ` Sean Anderson
2022-07-17 1:39 ` Andrew Lunn
2022-07-17 1:39 ` Andrew Lunn
2022-07-18 16:22 ` Russell King (Oracle)
2022-07-18 16:22 ` Russell King (Oracle)
2022-07-18 16:29 ` Sean Anderson
2022-07-18 16:29 ` Sean Anderson
2022-07-18 16:14 ` Russell King (Oracle)
2022-07-18 16:14 ` Russell King (Oracle)
2022-07-18 16:12 ` Russell King (Oracle)
2022-07-18 16:12 ` Russell King (Oracle)
2022-07-18 16:45 ` Sean Anderson
2022-07-18 16:45 ` Sean Anderson
2022-07-18 17:58 ` Russell King (Oracle)
2022-07-18 17:58 ` Russell King (Oracle)
2022-07-15 21:59 ` [PATCH net-next v3 11/47] [RFC] net: phylink: Add support for CRS-based " Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 12/47] net: phy: aquantia: Add support for AQR115 Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 18:17 ` Andrew Lunn
2022-07-16 18:17 ` Andrew Lunn
2022-07-16 22:42 ` Sean Anderson
2022-07-16 22:42 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 13/47] net: phy: aquantia: Add some additional phy interfaces Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 18:18 ` Andrew Lunn
2022-07-16 18:18 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 14/47] net: phy: aquantia: Add support for rate adaptation Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 18:38 ` Andrew Lunn
2022-07-16 18:38 ` Andrew Lunn
2022-07-16 22:45 ` Sean Anderson
2022-07-16 22:45 ` Sean Anderson
2022-07-17 1:42 ` Andrew Lunn
2022-07-17 1:42 ` Andrew Lunn
2022-07-15 21:59 ` [PATCH net-next v3 15/47] net: fman: Convert to SPDX identifiers Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 16/47] net: fman: Don't pass comm_mode to enable/disable Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 17/47] net: fman: Store en/disable in mac_device instead of mac_priv_s Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 18/47] net: fman: dtsec: Always gracefully stop/start Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 19/47] net: fman: Get PCS node in per-mac init Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:39 ` Camelia Alexandra Groza
2022-07-21 12:39 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 20/47] net: fman: Store initialization function in match data Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:51 ` Camelia Alexandra Groza
2022-07-21 12:51 ` Camelia Alexandra Groza
2022-07-21 15:34 ` Sean Anderson
2022-07-21 15:34 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 21/47] net: fman: Move struct dev to mac_device Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:52 ` Camelia Alexandra Groza
2022-07-21 12:52 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 22/47] net: fman: Configure fixed link in memac_initialization Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:57 ` Camelia Alexandra Groza
2022-07-21 12:57 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 23/47] net: fman: Export/rename some common functions Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:58 ` Camelia Alexandra Groza
2022-07-21 12:58 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 24/47] net: fman: memac: Use params instead of priv for max_speed Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:58 ` Camelia Alexandra Groza
2022-07-21 12:58 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 25/47] net: fman: Move initialization to mac-specific files Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:59 ` Camelia Alexandra Groza
2022-07-21 12:59 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 26/47] net: fman: Mark mac methods static Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 12:59 ` Camelia Alexandra Groza
2022-07-21 12:59 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 27/47] net: fman: Inline several functions into initialization Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:01 ` Camelia Alexandra Groza
2022-07-21 13:01 ` Camelia Alexandra Groza
2022-07-21 15:33 ` Sean Anderson
2022-07-21 15:33 ` Sean Anderson
2022-07-22 12:30 ` Camelia Alexandra Groza
2022-07-22 12:30 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 28/47] net: fman: Remove internal_phy_node from params Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:03 ` Camelia Alexandra Groza
2022-07-21 13:03 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 29/47] net: fman: Map the base address once Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:04 ` Camelia Alexandra Groza
2022-07-21 13:04 ` Camelia Alexandra Groza
2022-07-21 15:34 ` Sean Anderson
2022-07-21 15:34 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 30/47] net: fman: Pass params directly to mac init Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:05 ` Camelia Alexandra Groza
2022-07-21 13:05 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 31/47] net: fman: Use mac_dev for some params Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:05 ` Camelia Alexandra Groza
2022-07-21 13:05 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 32/47] net: fman: Specify type of mac_dev for exception_cb Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:06 ` Camelia Alexandra Groza
2022-07-21 13:06 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 33/47] net: fman: Clean up error handling Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:06 ` Camelia Alexandra Groza
2022-07-21 13:06 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 34/47] net: fman: Change return type of disable to void Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:08 ` Camelia Alexandra Groza
2022-07-21 13:08 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 35/47] net: dpaa: Use mac_dev variable in dpaa_netdev_init Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:15 ` Camelia Alexandra Groza
2022-07-21 13:15 ` Camelia Alexandra Groza
2022-07-21 15:36 ` Sean Anderson
2022-07-21 15:36 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 36/47] soc: fsl: qbman: Add helper for sanity checking cgr ops Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:16 ` Camelia Alexandra Groza
2022-07-21 13:16 ` Camelia Alexandra Groza
2022-07-21 13:16 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 37/47] soc: fsl: qbman: Add CGR update function Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-21 15:36 ` Sean Anderson
2022-07-21 15:36 ` Sean Anderson
2022-07-21 15:36 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 38/47] net: dpaa: Adjust queue depth on rate change Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-21 13:18 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 39/47] net: fman: memac: Add serdes support Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:30 ` Camelia Alexandra Groza
2022-07-21 13:30 ` Camelia Alexandra Groza
2022-07-21 15:38 ` Sean Anderson
2022-07-21 15:38 ` Sean Anderson
2022-07-22 12:43 ` Camelia Alexandra Groza
2022-07-22 12:43 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 40/47] net: fman: memac: Use lynx pcs driver Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 41/47] [RFT] net: dpaa: Convert to phylink Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-16 21:27 ` kernel test robot
2022-07-16 21:27 ` kernel test robot
2022-07-15 21:59 ` [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for QSGMII PCSs Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 13:48 ` Camelia Alexandra Groza
2022-07-21 13:48 ` Camelia Alexandra Groza
2022-07-21 13:48 ` Camelia Alexandra Groza
2022-07-21 17:51 ` Sean Anderson
2022-07-21 17:51 ` Sean Anderson
2022-07-21 17:51 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 43/47] arm64: dts: layerscape: " Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 44/47] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 45/47] arm64: dts: ls1088a: " Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: " Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 14:20 ` Camelia Alexandra Groza
2022-07-21 14:20 ` Camelia Alexandra Groza
2022-07-21 14:20 ` Camelia Alexandra Groza
2022-07-21 15:40 ` Sean Anderson
2022-07-21 15:40 ` Sean Anderson
2022-07-21 15:40 ` Sean Anderson
2022-07-22 12:41 ` Camelia Alexandra Groza
2022-07-22 12:41 ` Camelia Alexandra Groza
2022-07-22 12:41 ` Camelia Alexandra Groza
2022-07-25 20:02 ` Sean Anderson
2022-07-25 20:02 ` Sean Anderson
2022-07-25 20:02 ` Sean Anderson
2022-07-26 11:35 ` Camelia Alexandra Groza
2022-07-26 11:35 ` Camelia Alexandra Groza
2022-07-26 11:35 ` Camelia Alexandra Groza
2022-07-15 21:59 ` [PATCH net-next v3 47/47] [WIP] arm64: dts: ls1088ardb: " Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-15 21:59 ` Sean Anderson
2022-07-21 14:26 ` [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink Camelia Alexandra Groza
2022-07-21 14:26 ` Camelia Alexandra Groza
2022-07-21 14:26 ` Camelia Alexandra Groza
2022-07-21 14:26 ` Camelia Alexandra Groza
2022-07-21 15:39 ` Sean Anderson
2022-07-21 15:39 ` Sean Anderson
2022-07-21 15:39 ` Sean Anderson
2022-07-21 15:39 ` Sean Anderson
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