From: Sam Protsenko <semen.protsenko@linaro.org> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Rob Herring <robh+dt@kernel.org>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com> Cc: Alim Akhtar <alim.akhtar@samsung.com>, Chanho Park <chanho61.park@samsung.com>, David Virag <virag.david003@gmail.com>, Marek Szyprowski <m.szyprowski@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Sumit Semwal <sumit.semwal@linaro.org>, Tomasz Figa <tomasz.figa@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 2/9] dt-bindings: clock: Add bindings for Exynos850 CMU_IS Date: Tue, 9 Aug 2022 14:33:16 +0300 [thread overview] Message-ID: <20220809113323.29965-3-semen.protsenko@linaro.org> (raw) In-Reply-To: <20220809113323.29965-1-semen.protsenko@linaro.org> CMU_IS generates CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS. Add clock indices and bindings documentation for CMU_IS domain. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> --- Changes in v2: - (none) .../clock/samsung,exynos850-clock.yaml | 25 ++++++++++++ include/dt-bindings/clock/exynos850.h | 40 ++++++++++++++++++- 2 files changed, 64 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml index 53511f056251..7f2e0b1c764c 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -38,6 +38,7 @@ properties: - samsung,exynos850-cmu-core - samsung,exynos850-cmu-dpu - samsung,exynos850-cmu-hsi + - samsung,exynos850-cmu-is - samsung,exynos850-cmu-peri clocks: @@ -191,6 +192,30 @@ allOf: - const: dout_hsi_mmc_card - const: dout_hsi_usb20drd + - if: + properties: + compatible: + contains: + const: samsung,exynos850-cmu-is + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_IS bus clock (from CMU_TOP) + - description: Image Texture Processing core clock (from CMU_TOP) + - description: Visual Recognition Accelerator clock (from CMU_TOP) + - description: Geometric Distortion Correction clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_is_bus + - const: dout_is_itp + - const: dout_is_vra + - const: dout_is_gdc + - if: properties: compatible: diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h index 3dc55d4e5b9e..f8bf26f118c1 100644 --- a/include/dt-bindings/clock/exynos850.h +++ b/include/dt-bindings/clock/exynos850.h @@ -61,7 +61,19 @@ #define CLK_MOUT_AUD 49 #define CLK_GOUT_AUD 50 #define CLK_DOUT_AUD 51 -#define TOP_NR_CLK 52 +#define CLK_MOUT_IS_BUS 52 +#define CLK_MOUT_IS_ITP 53 +#define CLK_MOUT_IS_VRA 54 +#define CLK_MOUT_IS_GDC 55 +#define CLK_GOUT_IS_BUS 56 +#define CLK_GOUT_IS_ITP 57 +#define CLK_GOUT_IS_VRA 58 +#define CLK_GOUT_IS_GDC 59 +#define CLK_DOUT_IS_BUS 60 +#define CLK_DOUT_IS_ITP 61 +#define CLK_DOUT_IS_VRA 62 +#define CLK_DOUT_IS_GDC 63 +#define TOP_NR_CLK 64 /* CMU_APM */ #define CLK_RCO_I3C_PMIC 1 @@ -187,6 +199,32 @@ #define CLK_GOUT_SYSREG_HSI_PCLK 13 #define HSI_NR_CLK 14 +/* CMU_IS */ +#define CLK_MOUT_IS_BUS_USER 1 +#define CLK_MOUT_IS_ITP_USER 2 +#define CLK_MOUT_IS_VRA_USER 3 +#define CLK_MOUT_IS_GDC_USER 4 +#define CLK_DOUT_IS_BUSP 5 +#define CLK_GOUT_IS_CMU_IS_PCLK 6 +#define CLK_GOUT_IS_CSIS0_ACLK 7 +#define CLK_GOUT_IS_CSIS1_ACLK 8 +#define CLK_GOUT_IS_CSIS2_ACLK 9 +#define CLK_GOUT_IS_TZPC_PCLK 10 +#define CLK_GOUT_IS_CSIS_DMA_CLK 11 +#define CLK_GOUT_IS_GDC_CLK 12 +#define CLK_GOUT_IS_IPP_CLK 13 +#define CLK_GOUT_IS_ITP_CLK 14 +#define CLK_GOUT_IS_MCSC_CLK 15 +#define CLK_GOUT_IS_VRA_CLK 16 +#define CLK_GOUT_IS_PPMU_IS0_ACLK 17 +#define CLK_GOUT_IS_PPMU_IS0_PCLK 18 +#define CLK_GOUT_IS_PPMU_IS1_ACLK 19 +#define CLK_GOUT_IS_PPMU_IS1_PCLK 20 +#define CLK_GOUT_IS_SYSMMU_IS0_CLK 21 +#define CLK_GOUT_IS_SYSMMU_IS1_CLK 22 +#define CLK_GOUT_IS_SYSREG_PCLK 23 +#define IS_NR_CLK 24 + /* CMU_PERI */ #define CLK_MOUT_PERI_BUS_USER 1 #define CLK_MOUT_PERI_UART_USER 2 -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Sam Protsenko <semen.protsenko@linaro.org> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Rob Herring <robh+dt@kernel.org>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com> Cc: Alim Akhtar <alim.akhtar@samsung.com>, Chanho Park <chanho61.park@samsung.com>, David Virag <virag.david003@gmail.com>, Marek Szyprowski <m.szyprowski@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Sumit Semwal <sumit.semwal@linaro.org>, Tomasz Figa <tomasz.figa@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 2/9] dt-bindings: clock: Add bindings for Exynos850 CMU_IS Date: Tue, 9 Aug 2022 14:33:16 +0300 [thread overview] Message-ID: <20220809113323.29965-3-semen.protsenko@linaro.org> (raw) In-Reply-To: <20220809113323.29965-1-semen.protsenko@linaro.org> CMU_IS generates CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS. Add clock indices and bindings documentation for CMU_IS domain. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> --- Changes in v2: - (none) .../clock/samsung,exynos850-clock.yaml | 25 ++++++++++++ include/dt-bindings/clock/exynos850.h | 40 ++++++++++++++++++- 2 files changed, 64 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml index 53511f056251..7f2e0b1c764c 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -38,6 +38,7 @@ properties: - samsung,exynos850-cmu-core - samsung,exynos850-cmu-dpu - samsung,exynos850-cmu-hsi + - samsung,exynos850-cmu-is - samsung,exynos850-cmu-peri clocks: @@ -191,6 +192,30 @@ allOf: - const: dout_hsi_mmc_card - const: dout_hsi_usb20drd + - if: + properties: + compatible: + contains: + const: samsung,exynos850-cmu-is + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_IS bus clock (from CMU_TOP) + - description: Image Texture Processing core clock (from CMU_TOP) + - description: Visual Recognition Accelerator clock (from CMU_TOP) + - description: Geometric Distortion Correction clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_is_bus + - const: dout_is_itp + - const: dout_is_vra + - const: dout_is_gdc + - if: properties: compatible: diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h index 3dc55d4e5b9e..f8bf26f118c1 100644 --- a/include/dt-bindings/clock/exynos850.h +++ b/include/dt-bindings/clock/exynos850.h @@ -61,7 +61,19 @@ #define CLK_MOUT_AUD 49 #define CLK_GOUT_AUD 50 #define CLK_DOUT_AUD 51 -#define TOP_NR_CLK 52 +#define CLK_MOUT_IS_BUS 52 +#define CLK_MOUT_IS_ITP 53 +#define CLK_MOUT_IS_VRA 54 +#define CLK_MOUT_IS_GDC 55 +#define CLK_GOUT_IS_BUS 56 +#define CLK_GOUT_IS_ITP 57 +#define CLK_GOUT_IS_VRA 58 +#define CLK_GOUT_IS_GDC 59 +#define CLK_DOUT_IS_BUS 60 +#define CLK_DOUT_IS_ITP 61 +#define CLK_DOUT_IS_VRA 62 +#define CLK_DOUT_IS_GDC 63 +#define TOP_NR_CLK 64 /* CMU_APM */ #define CLK_RCO_I3C_PMIC 1 @@ -187,6 +199,32 @@ #define CLK_GOUT_SYSREG_HSI_PCLK 13 #define HSI_NR_CLK 14 +/* CMU_IS */ +#define CLK_MOUT_IS_BUS_USER 1 +#define CLK_MOUT_IS_ITP_USER 2 +#define CLK_MOUT_IS_VRA_USER 3 +#define CLK_MOUT_IS_GDC_USER 4 +#define CLK_DOUT_IS_BUSP 5 +#define CLK_GOUT_IS_CMU_IS_PCLK 6 +#define CLK_GOUT_IS_CSIS0_ACLK 7 +#define CLK_GOUT_IS_CSIS1_ACLK 8 +#define CLK_GOUT_IS_CSIS2_ACLK 9 +#define CLK_GOUT_IS_TZPC_PCLK 10 +#define CLK_GOUT_IS_CSIS_DMA_CLK 11 +#define CLK_GOUT_IS_GDC_CLK 12 +#define CLK_GOUT_IS_IPP_CLK 13 +#define CLK_GOUT_IS_ITP_CLK 14 +#define CLK_GOUT_IS_MCSC_CLK 15 +#define CLK_GOUT_IS_VRA_CLK 16 +#define CLK_GOUT_IS_PPMU_IS0_ACLK 17 +#define CLK_GOUT_IS_PPMU_IS0_PCLK 18 +#define CLK_GOUT_IS_PPMU_IS1_ACLK 19 +#define CLK_GOUT_IS_PPMU_IS1_PCLK 20 +#define CLK_GOUT_IS_SYSMMU_IS0_CLK 21 +#define CLK_GOUT_IS_SYSMMU_IS1_CLK 22 +#define CLK_GOUT_IS_SYSREG_PCLK 23 +#define IS_NR_CLK 24 + /* CMU_PERI */ #define CLK_MOUT_PERI_BUS_USER 1 #define CLK_MOUT_PERI_UART_USER 2 -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-08-09 11:33 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-09 11:33 [PATCH v2 0/9] exynos850: Add cmu and sysmmu nodes Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-09 11:33 ` [PATCH v2 1/9] dt-bindings: clock: Add bindings for Exynos850 CMU_AUD Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-12 8:46 ` Krzysztof Kozlowski 2022-08-12 8:46 ` Krzysztof Kozlowski 2022-08-17 19:31 ` Chanwoo Choi 2022-08-17 19:31 ` Chanwoo Choi 2022-08-09 11:33 ` Sam Protsenko [this message] 2022-08-09 11:33 ` [PATCH v2 2/9] dt-bindings: clock: Add bindings for Exynos850 CMU_IS Sam Protsenko 2022-08-17 19:32 ` Chanwoo Choi 2022-08-17 19:32 ` Chanwoo Choi 2022-08-09 11:33 ` [PATCH v2 3/9] dt-bindings: clock: Add bindings for Exynos850 CMU_MFCMSCL Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-17 19:34 ` Chanwoo Choi 2022-08-17 19:34 ` Chanwoo Choi 2022-08-09 11:33 ` [PATCH v2 4/9] clk: samsung: exynos850: Style fixes Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-12 8:47 ` Krzysztof Kozlowski 2022-08-12 8:47 ` Krzysztof Kozlowski 2022-08-17 18:13 ` Chanwoo Choi 2022-08-17 18:13 ` Chanwoo Choi 2022-08-09 11:33 ` [PATCH v2 5/9] clk: samsung: exynos850: Implement CMU_AUD domain Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-12 8:48 ` Krzysztof Kozlowski 2022-08-12 8:48 ` Krzysztof Kozlowski 2022-08-12 9:47 ` Krzysztof Kozlowski 2022-08-12 9:47 ` Krzysztof Kozlowski 2022-08-17 19:12 ` Chanwoo Choi 2022-08-17 19:12 ` Chanwoo Choi 2022-08-09 11:33 ` [PATCH v2 6/9] clk: samsung: exynos850: Implement CMU_IS domain Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-12 9:54 ` Krzysztof Kozlowski 2022-08-12 9:54 ` Krzysztof Kozlowski 2022-08-17 19:16 ` Chanwoo Choi 2022-08-17 19:16 ` Chanwoo Choi 2022-08-09 11:33 ` [PATCH v2 7/9] clk: samsung: exynos850: Implement CMU_MFCMSCL domain Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-12 9:55 ` Krzysztof Kozlowski 2022-08-12 9:55 ` Krzysztof Kozlowski 2022-08-17 19:17 ` Chanwoo Choi 2022-08-17 19:17 ` Chanwoo Choi 2022-08-09 11:33 ` [PATCH v2 8/9] arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850 Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-09 11:33 ` [PATCH v2 9/9] arm64: dts: exynos: Add SysMMU nodes " Sam Protsenko 2022-08-09 11:33 ` Sam Protsenko 2022-08-23 7:26 ` [PATCH v2 0/9] exynos850: Add cmu and sysmmu nodes Krzysztof Kozlowski 2022-08-23 7:26 ` Krzysztof Kozlowski
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