From: Yicong Yang <yangyicong@huawei.com> To: <gregkh@linuxfoundation.org>, <alexander.shishkin@linux.intel.com>, <leo.yan@linaro.org>, <james.clark@arm.com>, <will@kernel.org>, <robin.murphy@arm.com>, <acme@kernel.org>, <peterz@infradead.org>, <corbet@lwn.net>, <mathieu.poirier@linaro.org>, <mark.rutland@arm.com>, <jonathan.cameron@huawei.com>, <john.garry@huawei.com> Cc: <helgaas@kernel.org>, <lorenzo.pieralisi@arm.com>, <suzuki.poulose@arm.com>, <joro@8bytes.org>, <shameerali.kolothum.thodi@huawei.com>, <mingo@redhat.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-pci@vger.kernel.org>, <linux-perf-users@vger.kernel.org>, <iommu@lists.linux-foundation.org>, <iommu@lists.linux.dev>, <linux-doc@vger.kernel.org>, <prime.zeng@huawei.com>, <liuqi115@huawei.com>, <zhangshaokun@hisilicon.com>, <linuxarm@huawei.com>, <yangyicong@hisilicon.com>, <bagasdotme@gmail.com> Subject: [PATCH v12 1/5] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Date: Tue, 16 Aug 2022 19:44:10 +0800 [thread overview] Message-ID: <20220816114414.4092-2-yangyicong@huawei.com> (raw) In-Reply-To: <20220816114414.4092-1-yangyicong@huawei.com> From: Yicong Yang <yangyicong@hisilicon.com> The DMA operations of HiSilicon PTT device can only work properly with identical mappings. So add a quirk for the device to force the domain as passthrough. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: John Garry <john.garry@huawei.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d32b02336411..71f7edded9cf 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2817,6 +2817,26 @@ static int arm_smmu_dev_disable_feature(struct device *dev, } } +/* + * HiSilicon PCIe tune and trace device can be used to trace TLP headers on the + * PCIe link and save the data to memory by DMA. The hardware is restricted to + * use identity mapping only. + */ +#define IS_HISI_PTT_DEVICE(pdev) ((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \ + (pdev)->device == 0xa12e) + +static int arm_smmu_def_domain_type(struct device *dev) +{ + if (dev_is_pci(dev)) { + struct pci_dev *pdev = to_pci_dev(dev); + + if (IS_HISI_PTT_DEVICE(pdev)) + return IOMMU_DOMAIN_IDENTITY; + } + + return 0; +} + static struct iommu_ops arm_smmu_ops = { .capable = arm_smmu_capable, .domain_alloc = arm_smmu_domain_alloc, @@ -2831,6 +2851,7 @@ static struct iommu_ops arm_smmu_ops = { .sva_unbind = arm_smmu_sva_unbind, .sva_get_pasid = arm_smmu_sva_get_pasid, .page_response = arm_smmu_page_response, + .def_domain_type = arm_smmu_def_domain_type, .pgsize_bitmap = -1UL, /* Restricted during device attach */ .owner = THIS_MODULE, .default_domain_ops = &(const struct iommu_domain_ops) { -- 2.24.0
WARNING: multiple messages have this Message-ID (diff)
From: Yicong Yang <yangyicong@huawei.com> To: <gregkh@linuxfoundation.org>, <alexander.shishkin@linux.intel.com>, <leo.yan@linaro.org>, <james.clark@arm.com>, <will@kernel.org>, <robin.murphy@arm.com>, <acme@kernel.org>, <peterz@infradead.org>, <corbet@lwn.net>, <mathieu.poirier@linaro.org>, <mark.rutland@arm.com>, <jonathan.cameron@huawei.com>, <john.garry@huawei.com> Cc: <helgaas@kernel.org>, <lorenzo.pieralisi@arm.com>, <suzuki.poulose@arm.com>, <joro@8bytes.org>, <shameerali.kolothum.thodi@huawei.com>, <mingo@redhat.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-pci@vger.kernel.org>, <linux-perf-users@vger.kernel.org>, <iommu@lists.linux-foundation.org>, <iommu@lists.linux.dev>, <linux-doc@vger.kernel.org>, <prime.zeng@huawei.com>, <liuqi115@huawei.com>, <zhangshaokun@hisilicon.com>, <linuxarm@huawei.com>, <yangyicong@hisilicon.com>, <bagasdotme@gmail.com> Subject: [PATCH v12 1/5] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Date: Tue, 16 Aug 2022 19:44:10 +0800 [thread overview] Message-ID: <20220816114414.4092-2-yangyicong@huawei.com> (raw) In-Reply-To: <20220816114414.4092-1-yangyicong@huawei.com> From: Yicong Yang <yangyicong@hisilicon.com> The DMA operations of HiSilicon PTT device can only work properly with identical mappings. So add a quirk for the device to force the domain as passthrough. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: John Garry <john.garry@huawei.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d32b02336411..71f7edded9cf 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2817,6 +2817,26 @@ static int arm_smmu_dev_disable_feature(struct device *dev, } } +/* + * HiSilicon PCIe tune and trace device can be used to trace TLP headers on the + * PCIe link and save the data to memory by DMA. The hardware is restricted to + * use identity mapping only. + */ +#define IS_HISI_PTT_DEVICE(pdev) ((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \ + (pdev)->device == 0xa12e) + +static int arm_smmu_def_domain_type(struct device *dev) +{ + if (dev_is_pci(dev)) { + struct pci_dev *pdev = to_pci_dev(dev); + + if (IS_HISI_PTT_DEVICE(pdev)) + return IOMMU_DOMAIN_IDENTITY; + } + + return 0; +} + static struct iommu_ops arm_smmu_ops = { .capable = arm_smmu_capable, .domain_alloc = arm_smmu_domain_alloc, @@ -2831,6 +2851,7 @@ static struct iommu_ops arm_smmu_ops = { .sva_unbind = arm_smmu_sva_unbind, .sva_get_pasid = arm_smmu_sva_get_pasid, .page_response = arm_smmu_page_response, + .def_domain_type = arm_smmu_def_domain_type, .pgsize_bitmap = -1UL, /* Restricted during device attach */ .owner = THIS_MODULE, .default_domain_ops = &(const struct iommu_domain_ops) { -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-08-16 12:01 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-16 11:44 [PATCH v12 0/5] Add driver support for HiSilicon PCIe Tune and Trace device Yicong Yang 2022-08-16 11:44 ` Yicong Yang 2022-08-16 11:44 ` Yicong Yang [this message] 2022-08-16 11:44 ` [PATCH v12 1/5] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Yicong Yang 2022-08-16 11:44 ` [PATCH v12 2/5] hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device Yicong Yang 2022-08-16 11:44 ` Yicong Yang 2022-08-16 11:44 ` [PATCH v12 3/5] hwtracing: hisi_ptt: Add tune " Yicong Yang 2022-08-16 11:44 ` Yicong Yang 2022-08-16 11:44 ` [PATCH v12 4/5] docs: trace: Add HiSilicon PTT device driver documentation Yicong Yang 2022-08-16 11:44 ` Yicong Yang 2022-08-16 11:44 ` [PATCH v12 5/5] MAINTAINERS: Add maintainer for HiSilicon PTT driver Yicong Yang 2022-08-16 11:44 ` Yicong Yang 2022-08-30 10:59 ` [PATCH v12 0/5] Add driver support for HiSilicon PCIe Tune and Trace device Yicong Yang 2022-08-30 10:59 ` Yicong Yang 2022-09-01 16:53 ` Mathieu Poirier 2022-09-01 16:53 ` Mathieu Poirier 2022-09-08 23:09 ` Mathieu Poirier 2022-09-08 23:09 ` Mathieu Poirier 2022-09-09 6:17 ` Yicong Yang 2022-09-09 6:17 ` Yicong Yang
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