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From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Bobo WL <lmw.bobo@gmail.com>,
	Ben Widawsky <ben.widawsky@intel.com>
Subject: [PULL 08/12] hw/cxl: Add stub write function for RO MemoryRegionOps entries.
Date: Wed, 17 Aug 2022 16:06:17 -0400	[thread overview]
Message-ID: <20220817200536.350795-9-mst@redhat.com> (raw)
In-Reply-To: <20220817200536.350795-1-mst@redhat.com>

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

There is no checking on the availability of a write callback.
Hence QEMU crashes if a write does occur to one of these regions.

Discovered whilst chasing a Linux kernel bug that incorrectly
wrote into one of these regions.

Fixes: 6364adacdf ("hw/cxl/device: Implement the CAP array (8.2.8.1-2)")
Reported-by: Bobo WL <lmw.bobo@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220817145759.32603-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/cxl/cxl-device-utils.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/hw/cxl/cxl-device-utils.c b/hw/cxl/cxl-device-utils.c
index 687759b301..83ce7a8270 100644
--- a/hw/cxl/cxl-device-utils.c
+++ b/hw/cxl/cxl-device-utils.c
@@ -141,9 +141,15 @@ static uint64_t mdev_reg_read(void *opaque, hwaddr offset, unsigned size)
     return retval;
 }
 
+static void ro_reg_write(void *opaque, hwaddr offset, uint64_t value,
+                           unsigned size)
+{
+    /* Many register sets are read only */
+}
+
 static const MemoryRegionOps mdev_ops = {
     .read = mdev_reg_read,
-    .write = NULL, /* memory device register is read only */
+    .write = ro_reg_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
@@ -173,7 +179,7 @@ static const MemoryRegionOps mailbox_ops = {
 
 static const MemoryRegionOps dev_ops = {
     .read = dev_reg_read,
-    .write = NULL, /* status register is read only */
+    .write = ro_reg_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
@@ -188,7 +194,7 @@ static const MemoryRegionOps dev_ops = {
 
 static const MemoryRegionOps caps_ops = {
     .read = caps_reg_read,
-    .write = NULL, /* caps registers are read only */
+    .write = ro_reg_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 1,
-- 
MST



  parent reply	other threads:[~2022-08-17 20:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-17 20:05 [PULL 00/12] pc,virtio: fixes Michael S. Tsirkin
2022-08-17 20:05 ` [PULL 01/12] virtio-scsi: fix race in virtio_scsi_dataplane_start() Michael S. Tsirkin
2022-08-17 20:05 ` [PULL 02/12] hw/virtio: gracefully handle unset vhost_dev vdev Michael S. Tsirkin
2022-08-17 20:05 ` [PULL 03/12] hw/virtio: handle un-configured shutdown in virtio-pci Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 04/12] hw/virtio: fix vhost_user_read tracepoint Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 05/12] x86: disable rng seeding via setup_data Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 06/12] hw/cxl: Fix memory leak in error paths Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 07/12] hw/cxl: Fix wrong query of target ports Michael S. Tsirkin
2022-08-17 20:06 ` Michael S. Tsirkin [this message]
2022-08-17 20:06 ` [PULL 09/12] hw/cxl: Fix Get LSA input payload size which should be 8 bytes Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 10/12] hw/cxl: Correctly handle variable sized mailbox input payloads Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 11/12] tests: acpi: silence applesmc warning about invalid key Michael S. Tsirkin
2022-08-17 20:06 ` [PULL 12/12] virtio-pci: don't touch pci on virtio reset Michael S. Tsirkin
2022-08-18 15:35 ` [PULL 00/12] pc,virtio: fixes Richard Henderson

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