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From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, maz@kernel.org, will@kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/6] KVM: arm64: Add a visibility bit to ignore user writes
Date: Wed, 17 Aug 2022 21:48:16 +0000	[thread overview]
Message-ID: <20220817214818.3243383-5-oliver.upton@linux.dev> (raw)
In-Reply-To: <20220817214818.3243383-1-oliver.upton@linux.dev>

We're about to ignore writes to AArch32 ID registers on AArch64-only
systems. Add a bit to indicate a register is handled as write ignore
when accessed from userspace.

Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
 arch/arm64/kvm/sys_regs.c | 3 +++
 arch/arm64/kvm/sys_regs.h | 7 +++++++
 2 files changed, 10 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 26210f3a0b27..9f06c85f26b8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1232,6 +1232,9 @@ static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
 	bool raz = sysreg_visible_as_raz(vcpu, rd);
 
+	if (sysreg_user_write_ignore(vcpu, rd))
+		return 0;
+
 	/* This is what we mean by invariant: you can't change it. */
 	if (val != read_id_reg(vcpu, rd, raz))
 		return -EINVAL;
diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
index e78b51059622..e4ebb3a379fd 100644
--- a/arch/arm64/kvm/sys_regs.h
+++ b/arch/arm64/kvm/sys_regs.h
@@ -86,6 +86,7 @@ struct sys_reg_desc {
 
 #define REG_HIDDEN		(1 << 0) /* hidden from userspace and guest */
 #define REG_RAZ			(1 << 1) /* RAZ from userspace and guest */
+#define REG_USER_WI		(1 << 2) /* WI from userspace only */
 
 static __printf(2, 3)
 inline void print_sys_reg_msg(const struct sys_reg_params *p,
@@ -157,6 +158,12 @@ static inline bool sysreg_visible_as_raz(const struct kvm_vcpu *vcpu,
 	return sysreg_visibility(vcpu, r) & REG_RAZ;
 }
 
+static inline bool sysreg_user_write_ignore(const struct kvm_vcpu *vcpu,
+					    const struct sys_reg_desc *r)
+{
+	return sysreg_visibility(vcpu, r) & REG_USER_WI;
+}
+
 static inline int cmp_sys_reg(const struct sys_reg_desc *i1,
 			      const struct sys_reg_desc *i2)
 {
-- 
2.37.1.595.g718a3a8f04-goog

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	maz@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com,
	suzuki.poulose@arm.com, will@kernel.org,
	Oliver Upton <oliver.upton@linux.dev>
Subject: [PATCH 4/6] KVM: arm64: Add a visibility bit to ignore user writes
Date: Wed, 17 Aug 2022 21:48:16 +0000	[thread overview]
Message-ID: <20220817214818.3243383-5-oliver.upton@linux.dev> (raw)
In-Reply-To: <20220817214818.3243383-1-oliver.upton@linux.dev>

We're about to ignore writes to AArch32 ID registers on AArch64-only
systems. Add a bit to indicate a register is handled as write ignore
when accessed from userspace.

Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
 arch/arm64/kvm/sys_regs.c | 3 +++
 arch/arm64/kvm/sys_regs.h | 7 +++++++
 2 files changed, 10 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 26210f3a0b27..9f06c85f26b8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1232,6 +1232,9 @@ static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
 	bool raz = sysreg_visible_as_raz(vcpu, rd);
 
+	if (sysreg_user_write_ignore(vcpu, rd))
+		return 0;
+
 	/* This is what we mean by invariant: you can't change it. */
 	if (val != read_id_reg(vcpu, rd, raz))
 		return -EINVAL;
diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
index e78b51059622..e4ebb3a379fd 100644
--- a/arch/arm64/kvm/sys_regs.h
+++ b/arch/arm64/kvm/sys_regs.h
@@ -86,6 +86,7 @@ struct sys_reg_desc {
 
 #define REG_HIDDEN		(1 << 0) /* hidden from userspace and guest */
 #define REG_RAZ			(1 << 1) /* RAZ from userspace and guest */
+#define REG_USER_WI		(1 << 2) /* WI from userspace only */
 
 static __printf(2, 3)
 inline void print_sys_reg_msg(const struct sys_reg_params *p,
@@ -157,6 +158,12 @@ static inline bool sysreg_visible_as_raz(const struct kvm_vcpu *vcpu,
 	return sysreg_visibility(vcpu, r) & REG_RAZ;
 }
 
+static inline bool sysreg_user_write_ignore(const struct kvm_vcpu *vcpu,
+					    const struct sys_reg_desc *r)
+{
+	return sysreg_visibility(vcpu, r) & REG_USER_WI;
+}
+
 static inline int cmp_sys_reg(const struct sys_reg_desc *i1,
 			      const struct sys_reg_desc *i2)
 {
-- 
2.37.1.595.g718a3a8f04-goog


WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	maz@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com,
	suzuki.poulose@arm.com, will@kernel.org,
	Oliver Upton <oliver.upton@linux.dev>
Subject: [PATCH 4/6] KVM: arm64: Add a visibility bit to ignore user writes
Date: Wed, 17 Aug 2022 21:48:16 +0000	[thread overview]
Message-ID: <20220817214818.3243383-5-oliver.upton@linux.dev> (raw)
In-Reply-To: <20220817214818.3243383-1-oliver.upton@linux.dev>

We're about to ignore writes to AArch32 ID registers on AArch64-only
systems. Add a bit to indicate a register is handled as write ignore
when accessed from userspace.

Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
 arch/arm64/kvm/sys_regs.c | 3 +++
 arch/arm64/kvm/sys_regs.h | 7 +++++++
 2 files changed, 10 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 26210f3a0b27..9f06c85f26b8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1232,6 +1232,9 @@ static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
 	bool raz = sysreg_visible_as_raz(vcpu, rd);
 
+	if (sysreg_user_write_ignore(vcpu, rd))
+		return 0;
+
 	/* This is what we mean by invariant: you can't change it. */
 	if (val != read_id_reg(vcpu, rd, raz))
 		return -EINVAL;
diff --git a/arch/arm64/kvm/sys_regs.h b/arch/arm64/kvm/sys_regs.h
index e78b51059622..e4ebb3a379fd 100644
--- a/arch/arm64/kvm/sys_regs.h
+++ b/arch/arm64/kvm/sys_regs.h
@@ -86,6 +86,7 @@ struct sys_reg_desc {
 
 #define REG_HIDDEN		(1 << 0) /* hidden from userspace and guest */
 #define REG_RAZ			(1 << 1) /* RAZ from userspace and guest */
+#define REG_USER_WI		(1 << 2) /* WI from userspace only */
 
 static __printf(2, 3)
 inline void print_sys_reg_msg(const struct sys_reg_params *p,
@@ -157,6 +158,12 @@ static inline bool sysreg_visible_as_raz(const struct kvm_vcpu *vcpu,
 	return sysreg_visibility(vcpu, r) & REG_RAZ;
 }
 
+static inline bool sysreg_user_write_ignore(const struct kvm_vcpu *vcpu,
+					    const struct sys_reg_desc *r)
+{
+	return sysreg_visibility(vcpu, r) & REG_USER_WI;
+}
+
 static inline int cmp_sys_reg(const struct sys_reg_desc *i1,
 			      const struct sys_reg_desc *i2)
 {
-- 
2.37.1.595.g718a3a8f04-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-08-17 21:48 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-17 21:48 [PATCH 0/6] KVM: arm64: Treat 32bit ID registers as RAZ/WI on 64bit-only system Oliver Upton
2022-08-17 21:48 ` Oliver Upton
2022-08-17 21:48 ` Oliver Upton
2022-08-17 21:48 ` [PATCH 1/6] KVM: arm64: Use visibility hook to treat ID regs as RAZ Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-30  4:54   ` Reiji Watanabe
2022-08-30  4:54     ` Reiji Watanabe
2022-08-30  4:54     ` Reiji Watanabe
2022-08-17 21:48 ` [PATCH 2/6] KVM: arm64: Remove internal accessor helpers for id regs Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-30  5:45   ` Reiji Watanabe
2022-08-30  5:45     ` Reiji Watanabe
2022-08-30  5:45     ` Reiji Watanabe
2022-08-30 17:45     ` Oliver Upton
2022-08-30 17:45       ` Oliver Upton
2022-08-30 17:45       ` Oliver Upton
2022-08-17 21:48 ` [PATCH 3/6] KVM: arm64: Spin off helper for calling visibility hook Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-30  6:01   ` Reiji Watanabe
2022-08-30  6:01     ` Reiji Watanabe
2022-08-30  6:01     ` Reiji Watanabe
2022-08-17 21:48 ` Oliver Upton [this message]
2022-08-17 21:48   ` [PATCH 4/6] KVM: arm64: Add a visibility bit to ignore user writes Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-31  3:29   ` Reiji Watanabe
2022-08-31  3:29     ` Reiji Watanabe
2022-08-31  3:29     ` Reiji Watanabe
2022-08-31 14:42     ` Oliver Upton
2022-08-31 14:42       ` Oliver Upton
2022-08-31 14:42       ` Oliver Upton
2022-09-01  4:57       ` Reiji Watanabe
2022-09-01  4:57         ` Reiji Watanabe
2022-09-01  4:57         ` Reiji Watanabe
2022-08-17 21:48 ` [PATCH 5/6] KVM: arm64: Treat 32bit ID registers as RAZ/WI on 64bit-only system Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-23 17:05   ` Marc Zyngier
2022-08-23 17:05     ` Marc Zyngier
2022-08-23 17:05     ` Marc Zyngier
2022-08-23 17:27     ` Oliver Upton
2022-08-23 17:27       ` Oliver Upton
2022-08-23 17:27       ` Oliver Upton
2022-08-17 21:48 ` [PATCH 6/6] KVM: selftests: Add test for RAZ/WI AArch32 ID registers Oliver Upton
2022-08-17 21:48   ` Oliver Upton
2022-08-17 21:48   ` Oliver Upton

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