All of lore.kernel.org
 help / color / mirror / Atom feed
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	Aravind Iddamsetty <aravind.iddamsetty@intel.com>,
	dri-devel@lists.freedesktop.org,
	Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Subject: [PATCH v2 00/12] i915: Add "standalone media" support for MTL
Date: Fri,  2 Sep 2022 16:32:45 -0700	[thread overview]
Message-ID: <20220902233257.3088492-1-matthew.d.roper@intel.com> (raw)

Starting with MTL, media functionality has moved into a new, second GT
at the hardware level.  This new GT, referred to as "standalone media"
in the spec, has its own GuC, power management/forcewake, etc.  The
general non-engine GT registers for standalone media start at 0x380000,
but otherwise use the same MMIO offsets as the primary GT.

Standalone media has a lot of similarity to the remote tiles
present on platforms like xehpsdv and pvc, and our i915 implementation
can share much of the general "multi GT" infrastructure between the two
types of platforms.  However there are a few notable differences
we must deal with:
 - The 0x380000 offset only applies to the non-engine GT registers
   (which the specs refer to as "GSI" registers).  The engine registers
   remain at their usual locations (e.g., 0x1C0000 for VCS0).
 - Unlike platforms with remote tiles, all interrupt handling for
   standalone media still happens via the primary GT.


v2:
 - Added new patches to ensure each GT, not just the primary, is
   handled properly during various init/suspend/resume/teardown flows.
 - Simplified GSI offset handling and split it into its own patch.
 - Correct gt->irq_lock assignment for media GT.
 - Fix jump target for intel_root_gt_init_early() errors.

Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>

Matt Roper (12):
  drm/i915: Move locking and unclaimed check into
    mmio_debug_{suspend,resume}
  drm/i915: Only hook up uncore->debug for primary uncore
  drm/i915: Use managed allocations for extra uncore objects
  drm/i915: Prepare more multi-GT initialization
  drm/i915: Rename and expose common GT early init routine
  drm/i915: Use a DRM-managed action to release the PCI bridge device
  drm/i915: Initialize MMIO access for each GT
  drm/i915: Handle each GT on init/release and suspend/resume
  drm/i915/uncore: Add GSI offset to uncore
  drm/i915/xelpmp: Expose media as another GT
  drm/i915/mtl: Use primary GT's irq lock for media GT
  drm/i915/mtl: Hook up interrupts for standalone media

 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  10 +-
 drivers/gpu/drm/i915/gt/intel_gt.c            |  96 ++++++++++++----
 drivers/gpu/drm/i915/gt/intel_gt.h            |   4 +-
 drivers/gpu/drm/i915/gt/intel_gt_irq.c        |  35 ++++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c     |   8 +-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |  10 ++
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |   5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |  26 ++---
 drivers/gpu/drm/i915/gt/intel_sa_media.c      |  47 ++++++++
 drivers/gpu/drm/i915/gt/intel_sa_media.h      |  15 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        |  24 ++--
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |   4 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   4 +-
 drivers/gpu/drm/i915/i915_driver.c            | 105 ++++++++++++------
 drivers/gpu/drm/i915/i915_drv.h               |   5 +
 drivers/gpu/drm/i915/i915_irq.c               |   4 +-
 drivers/gpu/drm/i915/i915_pci.c               |  15 +++
 drivers/gpu/drm/i915/intel_device_info.h      |  19 ++++
 drivers/gpu/drm/i915/intel_uncore.c           |  83 +++++++++-----
 drivers/gpu/drm/i915/intel_uncore.h           |  28 ++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.c          |   4 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c      |  14 +--
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c  |   4 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   1 +
 25 files changed, 424 insertions(+), 147 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h

-- 
2.37.2


WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 00/12] i915: Add "standalone media" support for MTL
Date: Fri,  2 Sep 2022 16:32:45 -0700	[thread overview]
Message-ID: <20220902233257.3088492-1-matthew.d.roper@intel.com> (raw)

Starting with MTL, media functionality has moved into a new, second GT
at the hardware level.  This new GT, referred to as "standalone media"
in the spec, has its own GuC, power management/forcewake, etc.  The
general non-engine GT registers for standalone media start at 0x380000,
but otherwise use the same MMIO offsets as the primary GT.

Standalone media has a lot of similarity to the remote tiles
present on platforms like xehpsdv and pvc, and our i915 implementation
can share much of the general "multi GT" infrastructure between the two
types of platforms.  However there are a few notable differences
we must deal with:
 - The 0x380000 offset only applies to the non-engine GT registers
   (which the specs refer to as "GSI" registers).  The engine registers
   remain at their usual locations (e.g., 0x1C0000 for VCS0).
 - Unlike platforms with remote tiles, all interrupt handling for
   standalone media still happens via the primary GT.


v2:
 - Added new patches to ensure each GT, not just the primary, is
   handled properly during various init/suspend/resume/teardown flows.
 - Simplified GSI offset handling and split it into its own patch.
 - Correct gt->irq_lock assignment for media GT.
 - Fix jump target for intel_root_gt_init_early() errors.

Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>

Matt Roper (12):
  drm/i915: Move locking and unclaimed check into
    mmio_debug_{suspend,resume}
  drm/i915: Only hook up uncore->debug for primary uncore
  drm/i915: Use managed allocations for extra uncore objects
  drm/i915: Prepare more multi-GT initialization
  drm/i915: Rename and expose common GT early init routine
  drm/i915: Use a DRM-managed action to release the PCI bridge device
  drm/i915: Initialize MMIO access for each GT
  drm/i915: Handle each GT on init/release and suspend/resume
  drm/i915/uncore: Add GSI offset to uncore
  drm/i915/xelpmp: Expose media as another GT
  drm/i915/mtl: Use primary GT's irq lock for media GT
  drm/i915/mtl: Hook up interrupts for standalone media

 drivers/gpu/drm/i915/Makefile                 |   1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  10 +-
 drivers/gpu/drm/i915/gt/intel_gt.c            |  96 ++++++++++++----
 drivers/gpu/drm/i915/gt/intel_gt.h            |   4 +-
 drivers/gpu/drm/i915/gt/intel_gt_irq.c        |  35 ++++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c     |   8 +-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       |  10 ++
 drivers/gpu/drm/i915/gt/intel_gt_types.h      |   5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |  26 ++---
 drivers/gpu/drm/i915/gt/intel_sa_media.c      |  47 ++++++++
 drivers/gpu/drm/i915/gt/intel_sa_media.h      |  15 +++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c        |  24 ++--
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |   4 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc.c         |   4 +-
 drivers/gpu/drm/i915/i915_driver.c            | 105 ++++++++++++------
 drivers/gpu/drm/i915/i915_drv.h               |   5 +
 drivers/gpu/drm/i915/i915_irq.c               |   4 +-
 drivers/gpu/drm/i915/i915_pci.c               |  15 +++
 drivers/gpu/drm/i915/intel_device_info.h      |  19 ++++
 drivers/gpu/drm/i915/intel_uncore.c           |  83 +++++++++-----
 drivers/gpu/drm/i915/intel_uncore.h           |  28 ++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.c          |   4 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c      |  14 +--
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c  |   4 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   1 +
 25 files changed, 424 insertions(+), 147 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h

-- 
2.37.2


             reply	other threads:[~2022-09-02 23:33 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-02 23:32 Matt Roper [this message]
2022-09-02 23:32 ` [Intel-gfx] [PATCH v2 00/12] i915: Add "standalone media" support for MTL Matt Roper
2022-09-02 23:32 ` [PATCH v2 01/12] drm/i915: Move locking and unclaimed check into mmio_debug_{suspend, resume} Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-06 13:39   ` Ruhl, Michael J
2022-09-06 13:39     ` [Intel-gfx] " Ruhl, Michael J
2022-09-06 17:08     ` Matt Roper
2022-09-06 17:08       ` [Intel-gfx] " Matt Roper
2022-09-06 17:10       ` Ruhl, Michael J
2022-09-06 17:10         ` [Intel-gfx] " Ruhl, Michael J
2022-09-02 23:32 ` [PATCH v2 02/12] drm/i915: Only hook up uncore->debug for primary uncore Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 03/12] drm/i915: Use managed allocations for extra uncore objects Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 04/12] drm/i915: Prepare more multi-GT initialization Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 05/12] drm/i915: Rename and expose common GT early init routine Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 06/12] drm/i915: Use a DRM-managed action to release the PCI bridge device Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 07/12] drm/i915: Initialize MMIO access for each GT Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 08/12] drm/i915: Handle each GT on init/release and suspend/resume Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:32 ` [PATCH v2 09/12] drm/i915/uncore: Add GSI offset to uncore Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-06 10:44   ` Iddamsetty, Aravind
2022-09-06 19:26     ` Matt Roper
2022-09-02 23:32 ` [PATCH v2 10/12] drm/i915/xelpmp: Expose media as another GT Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-06  8:57   ` Iddamsetty, Aravind
2022-09-06  8:57     ` [Intel-gfx] " Iddamsetty, Aravind
2022-09-02 23:32 ` [PATCH v2 11/12] drm/i915/mtl: Use primary GT's irq lock for media GT Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-03  3:29   ` kernel test robot
2022-09-02 23:32 ` [PATCH v2 12/12] drm/i915/mtl: Hook up interrupts for standalone media Matt Roper
2022-09-02 23:32   ` [Intel-gfx] " Matt Roper
2022-09-02 23:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Add "standalone media" support for MTL (rev3) Patchwork
2022-09-02 23:50 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-03  0:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-03  1:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220902233257.3088492-1-matthew.d.roper@intel.com \
    --to=matthew.d.roper@intel.com \
    --cc=aravind.iddamsetty@intel.com \
    --cc=daniele.ceraolospurio@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=radhakrishna.sripada@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.