From: Bard Liao <yung-chuan.liao@linux.intel.com> To: alsa-devel@alsa-project.org, vkoul@kernel.org Cc: vinod.koul@linaro.org, linux-kernel@vger.kernel.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com Subject: [PATCH 06/11] soundwire: intel: move shim initialization before power up/down Date: Tue, 20 Sep 2022 01:57:16 +0800 [thread overview] Message-ID: <20220919175721.354679-7-yung-chuan.liao@linux.intel.com> (raw) In-Reply-To: <20220919175721.354679-1-yung-chuan.liao@linux.intel.com> From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Move code around before additional simplification. No functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> --- drivers/soundwire/intel.c | 231 +++++++++++++++++++------------------- 1 file changed, 115 insertions(+), 116 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 2d828d98e153..140cf36eb407 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -260,6 +260,121 @@ static void intel_debugfs_exit(struct sdw_intel *sdw) {} /* * shim ops */ +/* this needs to be called with shim_lock */ +static void intel_shim_glue_to_master_ip(struct sdw_intel *sdw) +{ + void __iomem *shim = sdw->link_res->shim; + unsigned int link_id = sdw->instance; + u16 ioctl; + + /* Switch to MIP from Glue logic */ + ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); + + ioctl &= ~(SDW_SHIM_IOCTL_DOE); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl &= ~(SDW_SHIM_IOCTL_DO); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= (SDW_SHIM_IOCTL_MIF); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl &= ~(SDW_SHIM_IOCTL_BKE); + ioctl &= ~(SDW_SHIM_IOCTL_COE); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + /* at this point Master IP has full control of the I/Os */ +} + +/* this needs to be called with shim_lock */ +static void intel_shim_master_ip_to_glue(struct sdw_intel *sdw) +{ + unsigned int link_id = sdw->instance; + void __iomem *shim = sdw->link_res->shim; + u16 ioctl; + + /* Glue logic */ + ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); + ioctl |= SDW_SHIM_IOCTL_BKE; + ioctl |= SDW_SHIM_IOCTL_COE; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl &= ~(SDW_SHIM_IOCTL_MIF); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + /* at this point Integration Glue has full control of the I/Os */ +} + +static int intel_shim_init(struct sdw_intel *sdw) +{ + void __iomem *shim = sdw->link_res->shim; + unsigned int link_id = sdw->instance; + int ret = 0; + u16 ioctl = 0, act = 0; + + mutex_lock(sdw->link_res->shim_lock); + + /* Initialize Shim */ + ioctl |= SDW_SHIM_IOCTL_BKE; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= SDW_SHIM_IOCTL_WPDD; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= SDW_SHIM_IOCTL_DO; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= SDW_SHIM_IOCTL_DOE; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + intel_shim_glue_to_master_ip(sdw); + + u16p_replace_bits(&act, 0x1, SDW_SHIM_CTMCTL_DOAIS); + act |= SDW_SHIM_CTMCTL_DACTQE; + act |= SDW_SHIM_CTMCTL_DODS; + intel_writew(shim, SDW_SHIM_CTMCTL(link_id), act); + usleep_range(10, 15); + + mutex_unlock(sdw->link_res->shim_lock); + + return ret; +} + +static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) +{ + void __iomem *shim = sdw->link_res->shim; + unsigned int link_id = sdw->instance; + u16 wake_en, wake_sts; + + mutex_lock(sdw->link_res->shim_lock); + wake_en = intel_readw(shim, SDW_SHIM_WAKEEN); + + if (wake_enable) { + /* Enable the wakeup */ + wake_en |= (SDW_SHIM_WAKEEN_ENABLE << link_id); + intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); + } else { + /* Disable the wake up interrupt */ + wake_en &= ~(SDW_SHIM_WAKEEN_ENABLE << link_id); + intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); + + /* Clear wake status */ + wake_sts = intel_readw(shim, SDW_SHIM_WAKESTS); + wake_sts |= (SDW_SHIM_WAKESTS_STATUS << link_id); + intel_writew(shim, SDW_SHIM_WAKESTS, wake_sts); + } + mutex_unlock(sdw->link_res->shim_lock); +} static int intel_link_power_up(struct sdw_intel *sdw) { @@ -340,122 +455,6 @@ static int intel_link_power_up(struct sdw_intel *sdw) return ret; } -/* this needs to be called with shim_lock */ -static void intel_shim_glue_to_master_ip(struct sdw_intel *sdw) -{ - void __iomem *shim = sdw->link_res->shim; - unsigned int link_id = sdw->instance; - u16 ioctl; - - /* Switch to MIP from Glue logic */ - ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); - - ioctl &= ~(SDW_SHIM_IOCTL_DOE); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl &= ~(SDW_SHIM_IOCTL_DO); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= (SDW_SHIM_IOCTL_MIF); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl &= ~(SDW_SHIM_IOCTL_BKE); - ioctl &= ~(SDW_SHIM_IOCTL_COE); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - /* at this point Master IP has full control of the I/Os */ -} - -/* this needs to be called with shim_lock */ -static void intel_shim_master_ip_to_glue(struct sdw_intel *sdw) -{ - unsigned int link_id = sdw->instance; - void __iomem *shim = sdw->link_res->shim; - u16 ioctl; - - /* Glue logic */ - ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); - ioctl |= SDW_SHIM_IOCTL_BKE; - ioctl |= SDW_SHIM_IOCTL_COE; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl &= ~(SDW_SHIM_IOCTL_MIF); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - /* at this point Integration Glue has full control of the I/Os */ -} - -static int intel_shim_init(struct sdw_intel *sdw) -{ - void __iomem *shim = sdw->link_res->shim; - unsigned int link_id = sdw->instance; - int ret = 0; - u16 ioctl = 0, act = 0; - - mutex_lock(sdw->link_res->shim_lock); - - /* Initialize Shim */ - ioctl |= SDW_SHIM_IOCTL_BKE; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= SDW_SHIM_IOCTL_WPDD; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= SDW_SHIM_IOCTL_DO; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= SDW_SHIM_IOCTL_DOE; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - intel_shim_glue_to_master_ip(sdw); - - u16p_replace_bits(&act, 0x1, SDW_SHIM_CTMCTL_DOAIS); - act |= SDW_SHIM_CTMCTL_DACTQE; - act |= SDW_SHIM_CTMCTL_DODS; - intel_writew(shim, SDW_SHIM_CTMCTL(link_id), act); - usleep_range(10, 15); - - mutex_unlock(sdw->link_res->shim_lock); - - return ret; -} - -static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) -{ - void __iomem *shim = sdw->link_res->shim; - unsigned int link_id = sdw->instance; - u16 wake_en, wake_sts; - - mutex_lock(sdw->link_res->shim_lock); - wake_en = intel_readw(shim, SDW_SHIM_WAKEEN); - - if (wake_enable) { - /* Enable the wakeup */ - wake_en |= (SDW_SHIM_WAKEEN_ENABLE << link_id); - intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); - } else { - /* Disable the wake up interrupt */ - wake_en &= ~(SDW_SHIM_WAKEEN_ENABLE << link_id); - intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); - - /* Clear wake status */ - wake_sts = intel_readw(shim, SDW_SHIM_WAKESTS); - wake_sts |= (SDW_SHIM_WAKESTS_STATUS << link_id); - intel_writew(shim, SDW_SHIM_WAKESTS, wake_sts); - } - mutex_unlock(sdw->link_res->shim_lock); -} - static int intel_link_power_down(struct sdw_intel *sdw) { u32 link_control, spa_mask, cpa_mask; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Bard Liao <yung-chuan.liao@linux.intel.com> To: alsa-devel@alsa-project.org, vkoul@kernel.org Cc: pierre-louis.bossart@linux.intel.com, vinod.koul@linaro.org, bard.liao@intel.com, linux-kernel@vger.kernel.org Subject: [PATCH 06/11] soundwire: intel: move shim initialization before power up/down Date: Tue, 20 Sep 2022 01:57:16 +0800 [thread overview] Message-ID: <20220919175721.354679-7-yung-chuan.liao@linux.intel.com> (raw) In-Reply-To: <20220919175721.354679-1-yung-chuan.liao@linux.intel.com> From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Move code around before additional simplification. No functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> --- drivers/soundwire/intel.c | 231 +++++++++++++++++++------------------- 1 file changed, 115 insertions(+), 116 deletions(-) diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c index 2d828d98e153..140cf36eb407 100644 --- a/drivers/soundwire/intel.c +++ b/drivers/soundwire/intel.c @@ -260,6 +260,121 @@ static void intel_debugfs_exit(struct sdw_intel *sdw) {} /* * shim ops */ +/* this needs to be called with shim_lock */ +static void intel_shim_glue_to_master_ip(struct sdw_intel *sdw) +{ + void __iomem *shim = sdw->link_res->shim; + unsigned int link_id = sdw->instance; + u16 ioctl; + + /* Switch to MIP from Glue logic */ + ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); + + ioctl &= ~(SDW_SHIM_IOCTL_DOE); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl &= ~(SDW_SHIM_IOCTL_DO); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= (SDW_SHIM_IOCTL_MIF); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl &= ~(SDW_SHIM_IOCTL_BKE); + ioctl &= ~(SDW_SHIM_IOCTL_COE); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + /* at this point Master IP has full control of the I/Os */ +} + +/* this needs to be called with shim_lock */ +static void intel_shim_master_ip_to_glue(struct sdw_intel *sdw) +{ + unsigned int link_id = sdw->instance; + void __iomem *shim = sdw->link_res->shim; + u16 ioctl; + + /* Glue logic */ + ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); + ioctl |= SDW_SHIM_IOCTL_BKE; + ioctl |= SDW_SHIM_IOCTL_COE; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl &= ~(SDW_SHIM_IOCTL_MIF); + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + /* at this point Integration Glue has full control of the I/Os */ +} + +static int intel_shim_init(struct sdw_intel *sdw) +{ + void __iomem *shim = sdw->link_res->shim; + unsigned int link_id = sdw->instance; + int ret = 0; + u16 ioctl = 0, act = 0; + + mutex_lock(sdw->link_res->shim_lock); + + /* Initialize Shim */ + ioctl |= SDW_SHIM_IOCTL_BKE; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= SDW_SHIM_IOCTL_WPDD; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= SDW_SHIM_IOCTL_DO; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + ioctl |= SDW_SHIM_IOCTL_DOE; + intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); + usleep_range(10, 15); + + intel_shim_glue_to_master_ip(sdw); + + u16p_replace_bits(&act, 0x1, SDW_SHIM_CTMCTL_DOAIS); + act |= SDW_SHIM_CTMCTL_DACTQE; + act |= SDW_SHIM_CTMCTL_DODS; + intel_writew(shim, SDW_SHIM_CTMCTL(link_id), act); + usleep_range(10, 15); + + mutex_unlock(sdw->link_res->shim_lock); + + return ret; +} + +static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) +{ + void __iomem *shim = sdw->link_res->shim; + unsigned int link_id = sdw->instance; + u16 wake_en, wake_sts; + + mutex_lock(sdw->link_res->shim_lock); + wake_en = intel_readw(shim, SDW_SHIM_WAKEEN); + + if (wake_enable) { + /* Enable the wakeup */ + wake_en |= (SDW_SHIM_WAKEEN_ENABLE << link_id); + intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); + } else { + /* Disable the wake up interrupt */ + wake_en &= ~(SDW_SHIM_WAKEEN_ENABLE << link_id); + intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); + + /* Clear wake status */ + wake_sts = intel_readw(shim, SDW_SHIM_WAKESTS); + wake_sts |= (SDW_SHIM_WAKESTS_STATUS << link_id); + intel_writew(shim, SDW_SHIM_WAKESTS, wake_sts); + } + mutex_unlock(sdw->link_res->shim_lock); +} static int intel_link_power_up(struct sdw_intel *sdw) { @@ -340,122 +455,6 @@ static int intel_link_power_up(struct sdw_intel *sdw) return ret; } -/* this needs to be called with shim_lock */ -static void intel_shim_glue_to_master_ip(struct sdw_intel *sdw) -{ - void __iomem *shim = sdw->link_res->shim; - unsigned int link_id = sdw->instance; - u16 ioctl; - - /* Switch to MIP from Glue logic */ - ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); - - ioctl &= ~(SDW_SHIM_IOCTL_DOE); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl &= ~(SDW_SHIM_IOCTL_DO); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= (SDW_SHIM_IOCTL_MIF); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl &= ~(SDW_SHIM_IOCTL_BKE); - ioctl &= ~(SDW_SHIM_IOCTL_COE); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - /* at this point Master IP has full control of the I/Os */ -} - -/* this needs to be called with shim_lock */ -static void intel_shim_master_ip_to_glue(struct sdw_intel *sdw) -{ - unsigned int link_id = sdw->instance; - void __iomem *shim = sdw->link_res->shim; - u16 ioctl; - - /* Glue logic */ - ioctl = intel_readw(shim, SDW_SHIM_IOCTL(link_id)); - ioctl |= SDW_SHIM_IOCTL_BKE; - ioctl |= SDW_SHIM_IOCTL_COE; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl &= ~(SDW_SHIM_IOCTL_MIF); - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - /* at this point Integration Glue has full control of the I/Os */ -} - -static int intel_shim_init(struct sdw_intel *sdw) -{ - void __iomem *shim = sdw->link_res->shim; - unsigned int link_id = sdw->instance; - int ret = 0; - u16 ioctl = 0, act = 0; - - mutex_lock(sdw->link_res->shim_lock); - - /* Initialize Shim */ - ioctl |= SDW_SHIM_IOCTL_BKE; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= SDW_SHIM_IOCTL_WPDD; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= SDW_SHIM_IOCTL_DO; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - ioctl |= SDW_SHIM_IOCTL_DOE; - intel_writew(shim, SDW_SHIM_IOCTL(link_id), ioctl); - usleep_range(10, 15); - - intel_shim_glue_to_master_ip(sdw); - - u16p_replace_bits(&act, 0x1, SDW_SHIM_CTMCTL_DOAIS); - act |= SDW_SHIM_CTMCTL_DACTQE; - act |= SDW_SHIM_CTMCTL_DODS; - intel_writew(shim, SDW_SHIM_CTMCTL(link_id), act); - usleep_range(10, 15); - - mutex_unlock(sdw->link_res->shim_lock); - - return ret; -} - -static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) -{ - void __iomem *shim = sdw->link_res->shim; - unsigned int link_id = sdw->instance; - u16 wake_en, wake_sts; - - mutex_lock(sdw->link_res->shim_lock); - wake_en = intel_readw(shim, SDW_SHIM_WAKEEN); - - if (wake_enable) { - /* Enable the wakeup */ - wake_en |= (SDW_SHIM_WAKEEN_ENABLE << link_id); - intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); - } else { - /* Disable the wake up interrupt */ - wake_en &= ~(SDW_SHIM_WAKEEN_ENABLE << link_id); - intel_writew(shim, SDW_SHIM_WAKEEN, wake_en); - - /* Clear wake status */ - wake_sts = intel_readw(shim, SDW_SHIM_WAKESTS); - wake_sts |= (SDW_SHIM_WAKESTS_STATUS << link_id); - intel_writew(shim, SDW_SHIM_WAKESTS, wake_sts); - } - mutex_unlock(sdw->link_res->shim_lock); -} - static int intel_link_power_down(struct sdw_intel *sdw) { u32 link_control, spa_mask, cpa_mask; -- 2.25.1
next prev parent reply other threads:[~2022-09-19 17:51 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-19 17:57 [PATCH 00/11] soundwire: intel: cleanups/fixes before code reorganization Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 01/11] soundwire: intel: fix error handling on dai registration issues Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 02/11] soundwire: intel: simplify flow and use devm_ for DAI registration Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 03/11] soundwire: intel: move DAI registration and debugfs init earlier Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 04/11] soundwire: intel: move all PDI initialization under intel_register_dai() Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 05/11] soundwire: intel: remove clock_stop parameter in intel_shim_init() Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` Bard Liao [this message] 2022-09-19 17:57 ` [PATCH 06/11] soundwire: intel: move shim initialization before power up/down Bard Liao 2022-09-19 17:57 ` [PATCH 07/11] soundwire: intel: remove intel_init() wrapper Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 08/11] soundwire: intel: simplify read ops assignment Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 09/11] soundwire: intel: introduce intel_shim_check_wake() helper Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 10/11] soundwire: intel: introduce helpers to start bus Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-19 17:57 ` [PATCH 11/11] soundwire: intel: add helper to stop bus Bard Liao 2022-09-19 17:57 ` Bard Liao 2022-09-20 5:09 ` [PATCH 00/11] soundwire: intel: cleanups/fixes before code reorganization Vinod Koul 2022-09-20 5:09 ` Vinod Koul
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