From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: lpieralisi@kernel.org, robh+dt@kernel.org, kw@linux.com,
bhelgaas@google.com, krzk+dt@kernel.org
Cc: marek.vasut+renesas@gmail.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH v6 03/10] PCI: Add PCI_EXP_LNKCAP_MLW macros
Date: Thu, 22 Sep 2022 17:06:40 +0900 [thread overview]
Message-ID: <20220922080647.3489791-4-yoshihiro.shimoda.uh@renesas.com> (raw)
In-Reply-To: <20220922080647.3489791-1-yoshihiro.shimoda.uh@renesas.com>
Add macros defining Maximum Link Width bits in Link Capabilities
Register.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
include/uapi/linux/pci_regs.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 57b8e2ffb1dd..06c9e5d0ef33 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -538,6 +538,12 @@
#define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */
#define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 */
#define PCI_EXP_LNKCAP_SLS_64_0GB 0x00000006 /* LNKCAP2 SLS Vector bit 5 */
+#define PCI_EXP_LNKCAP_MLW_X1 0x00000010 /* Maximum Link Width x1 */
+#define PCI_EXP_LNKCAP_MLW_X2 0x00000020 /* Maximum Link Width x2 */
+#define PCI_EXP_LNKCAP_MLW_X4 0x00000040 /* Maximum Link Width x4 */
+#define PCI_EXP_LNKCAP_MLW_X8 0x00000080 /* Maximum Link Width x8 */
+#define PCI_EXP_LNKCAP_MLW_X12 0x000000c0 /* Maximum Link Width x12 */
+#define PCI_EXP_LNKCAP_MLW_X16 0x00000100 /* Maximum Link Width x16 */
#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* ASPM L0s Support */
--
2.25.1
next prev parent reply other threads:[~2022-09-22 8:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 8:06 [PATCH v6 00/10] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 01/10] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 02/10] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2022-09-22 8:06 ` Yoshihiro Shimoda [this message]
2022-09-22 8:06 ` [PATCH v6 04/10] PCI: designware-ep: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 05/10] PCI: designware-ep: Add ep_pre_init() callback to dw_pcie_ep_ops Yoshihiro Shimoda
2022-11-11 12:00 ` Lorenzo Pieralisi
2022-11-14 6:12 ` Yoshihiro Shimoda
2022-11-14 6:19 ` Manivannan Sadhasivam
2022-11-14 6:52 ` Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 06/10] PCI: dwc: Add reset_all_bars flag Yoshihiro Shimoda
2022-11-11 12:34 ` Lorenzo Pieralisi
2022-11-14 6:18 ` Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 07/10] PCI: dwc: Avoid reading a register to detect whether eDMA exists Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 08/10] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 09/10] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2022-09-22 8:06 ` [PATCH v6 10/10] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
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