From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: "Andy Gross" <agross@kernel.org>, "Bjorn Andersson" <andersson@kernel.org>, "Konrad Dybcio" <konrad.dybcio@somainline.org>, "Rob Herring" <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Jingoo Han" <jingoohan1@gmail.com>, "Gustavo Pimentel" <gustavo.pimentel@synopsys.com>, "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Vinod Koul" <vkoul@kernel.org>, "Kishon Vijay Abraham I" <kishon@kernel.org> Cc: Philipp Zabel <p.zabel@pengutronix.de>, Johan Hovold <johan@kernel.org>, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v4 1/8] dt-bindings: PCI: qcom: Add sm8350 to bindings Date: Sat, 19 Nov 2022 01:32:35 +0200 [thread overview] Message-ID: <20221118233242.2904088-2-dmitry.baryshkov@linaro.org> (raw) In-Reply-To: <20221118233242.2904088-1-dmitry.baryshkov@linaro.org> Add bindings for two PCIe hosts on SM8350 platform. The only difference between them is in the aggre0 clock, which warrants the oneOf clause for the clocks properties. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../devicetree/bindings/pci/qcom,pcie.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 2f851c804bb0..ea295bc30504 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -32,6 +32,7 @@ properties: - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 - qcom,pcie-ipq6018 @@ -193,6 +194,7 @@ allOf: - qcom,pcie-sc8180x - qcom,pcie-sc8280xp - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 then: @@ -548,6 +550,35 @@ allOf: items: - const: pci # PCIe core reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sm8350 + then: + properties: + clocks: + minItems: 8 + maxItems: 9 + clock-names: + minItems: 8 + items: + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: tbu # PCIe TBU clock + - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: aggre1 # Aggre NoC PCIe1 AXI clock + - const: aggre0 # Aggre NoC PCIe0 AXI clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + - if: properties: compatible: @@ -690,6 +721,7 @@ allOf: - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 then: -- 2.35.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> To: "Andy Gross" <agross@kernel.org>, "Bjorn Andersson" <andersson@kernel.org>, "Konrad Dybcio" <konrad.dybcio@somainline.org>, "Rob Herring" <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Jingoo Han" <jingoohan1@gmail.com>, "Gustavo Pimentel" <gustavo.pimentel@synopsys.com>, "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Vinod Koul" <vkoul@kernel.org>, "Kishon Vijay Abraham I" <kishon@kernel.org> Cc: Philipp Zabel <p.zabel@pengutronix.de>, Johan Hovold <johan@kernel.org>, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v4 1/8] dt-bindings: PCI: qcom: Add sm8350 to bindings Date: Sat, 19 Nov 2022 01:32:35 +0200 [thread overview] Message-ID: <20221118233242.2904088-2-dmitry.baryshkov@linaro.org> (raw) In-Reply-To: <20221118233242.2904088-1-dmitry.baryshkov@linaro.org> Add bindings for two PCIe hosts on SM8350 platform. The only difference between them is in the aggre0 clock, which warrants the oneOf clause for the clocks properties. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../devicetree/bindings/pci/qcom,pcie.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 2f851c804bb0..ea295bc30504 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -32,6 +32,7 @@ properties: - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 - qcom,pcie-ipq6018 @@ -193,6 +194,7 @@ allOf: - qcom,pcie-sc8180x - qcom,pcie-sc8280xp - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 then: @@ -548,6 +550,35 @@ allOf: items: - const: pci # PCIe core reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sm8350 + then: + properties: + clocks: + minItems: 8 + maxItems: 9 + clock-names: + minItems: 8 + items: + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: tbu # PCIe TBU clock + - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: aggre1 # Aggre NoC PCIe1 AXI clock + - const: aggre0 # Aggre NoC PCIe0 AXI clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + - if: properties: compatible: @@ -690,6 +721,7 @@ allOf: - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 + - qcom,pcie-sm8350 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 then: -- 2.35.1
next prev parent reply other threads:[~2022-11-18 23:32 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-18 23:32 [PATCH v4 0/8] PCI/phy: Add support for PCI on sm8350 platform Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov [this message] 2022-11-18 23:32 ` [PATCH v4 1/8] dt-bindings: PCI: qcom: Add sm8350 to bindings Dmitry Baryshkov 2022-11-30 17:52 ` Rob Herring 2022-11-30 17:52 ` Rob Herring 2022-11-18 23:32 ` [PATCH v4 2/8] dt-bindings: phy: qcom,qmp-pcie: add sm8350 bindings Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-11-18 23:32 ` [PATCH v4 3/8] PCI: qcom: Add support for SM8350 Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-12-29 17:31 ` Bjorn Andersson 2022-12-29 17:31 ` Bjorn Andersson 2022-11-18 23:32 ` [PATCH v4 4/8] phy: qcom-qmp-pcie: split sm8450 gen3 PHY config tables Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-11-18 23:32 ` [PATCH v4 5/8] phy: qcom-qmp-pcie: rename the " Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-11-18 23:32 ` [PATCH v4 6/8] phy: qcom-qmp-pcie: add support for sm8350 platform Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-11-18 23:32 ` [PATCH v4 7/8] arm64: dts: qcom: sm8350: add PCIe devices Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-11-18 23:32 ` [PATCH v4 8/8] arm64: dts: qcom: sm8350-hdk: enable " Dmitry Baryshkov 2022-11-18 23:32 ` Dmitry Baryshkov 2022-12-30 11:27 ` (subset) [PATCH v4 0/8] PCI/phy: Add support for PCI on sm8350 platform Lorenzo Pieralisi 2022-12-30 11:27 ` Lorenzo Pieralisi 2022-12-30 12:13 ` Dmitry Baryshkov 2022-12-30 12:13 ` Dmitry Baryshkov 2022-12-30 13:34 ` Lorenzo Pieralisi 2022-12-30 13:34 ` Lorenzo Pieralisi 2023-01-12 17:10 ` Vinod Koul 2023-01-12 17:10 ` Vinod Koul 2023-01-17 18:24 ` (subset) " Bjorn Andersson 2023-01-17 18:24 ` Bjorn Andersson
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