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From: Chen-Yu Tsai <wenst@chromium.org>
To: Matthias Brugger <matthias.bgg@gmail.com>
Cc: "Chen-Yu Tsai" <wenst@chromium.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Nícolas F . R . A . Prado" <nfraprado@collabora.com>
Subject: [PATCH 0/4] arm64: dts: mediatek: Fix systimer clock description
Date: Thu,  1 Dec 2022 16:42:25 +0800	[thread overview]
Message-ID: <20221201084229.3464449-1-wenst@chromium.org> (raw)

Hi,

This series fixes the clock description for the systimer block. The
systimer is fed by the main 26 MHz oscillator, and internally divides
the clock, normally by 2.

However this ended up being modeled in various incorrect ways, such as
the clock divider being in the TOPCKGEN block, or as a standalone 13 MHz
oscillator.

This series fixes the description of the systimer clock input in an ABI
compatible way, i.e. the clock rate of the input clock remains the same
at 13 MHz. The clock is now modeled as a divide-by-2 fixed factor clock
being fed by the main oscillator.

An added benefit is that in Linux the systimer no longer requires the
main SoC clk driver to do an early init dance.

Please have a look.

The next step would be to fix up the systimer driver in a backward
compatible way and have it read the divider value from hardware.


Regards
ChenYu

Chen-Yu Tsai (4):
  arm64: dts: mediatek: mt8183: Fix systimer 13 MHz clock description
  arm64: dts: mediatek: mt8192: Fix systimer 13 MHz clock description
  arm64: dts: mediatek: mt8195: Fix systimer 13 MHz clock description
  arm64: dts: mediatek: mt8186: Fix systimer 13 MHz clock description

 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++--
 arch/arm64/boot/dts/mediatek/mt8186.dtsi |  8 +++++---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++--
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 11 ++++++++++-
 4 files changed, 35 insertions(+), 8 deletions(-)

-- 
2.38.1.584.g0f3c55d4c2-goog


WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wenst@chromium.org>
To: Matthias Brugger <matthias.bgg@gmail.com>
Cc: "Chen-Yu Tsai" <wenst@chromium.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Nícolas F . R . A . Prado" <nfraprado@collabora.com>
Subject: [PATCH 0/4] arm64: dts: mediatek: Fix systimer clock description
Date: Thu,  1 Dec 2022 16:42:25 +0800	[thread overview]
Message-ID: <20221201084229.3464449-1-wenst@chromium.org> (raw)

Hi,

This series fixes the clock description for the systimer block. The
systimer is fed by the main 26 MHz oscillator, and internally divides
the clock, normally by 2.

However this ended up being modeled in various incorrect ways, such as
the clock divider being in the TOPCKGEN block, or as a standalone 13 MHz
oscillator.

This series fixes the description of the systimer clock input in an ABI
compatible way, i.e. the clock rate of the input clock remains the same
at 13 MHz. The clock is now modeled as a divide-by-2 fixed factor clock
being fed by the main oscillator.

An added benefit is that in Linux the systimer no longer requires the
main SoC clk driver to do an early init dance.

Please have a look.

The next step would be to fix up the systimer driver in a backward
compatible way and have it read the divider value from hardware.


Regards
ChenYu

Chen-Yu Tsai (4):
  arm64: dts: mediatek: mt8183: Fix systimer 13 MHz clock description
  arm64: dts: mediatek: mt8192: Fix systimer 13 MHz clock description
  arm64: dts: mediatek: mt8195: Fix systimer 13 MHz clock description
  arm64: dts: mediatek: mt8186: Fix systimer 13 MHz clock description

 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++--
 arch/arm64/boot/dts/mediatek/mt8186.dtsi |  8 +++++---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++--
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 11 ++++++++++-
 4 files changed, 35 insertions(+), 8 deletions(-)

-- 
2.38.1.584.g0f3c55d4c2-goog


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             reply	other threads:[~2022-12-01  8:42 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01  8:42 Chen-Yu Tsai [this message]
2022-12-01  8:42 ` [PATCH 0/4] arm64: dts: mediatek: Fix systimer clock description Chen-Yu Tsai
2022-12-01  8:42 ` [PATCH 1/4] arm64: dts: mediatek: mt8183: Fix systimer 13 MHz " Chen-Yu Tsai
2022-12-01  8:42   ` Chen-Yu Tsai
2022-12-01  9:31   ` AngeloGioacchino Del Regno
2022-12-01  9:31     ` AngeloGioacchino Del Regno
2022-12-01 10:33     ` Chen-Yu Tsai
2022-12-01 10:33       ` Chen-Yu Tsai
2022-12-13 11:24       ` AngeloGioacchino Del Regno
2022-12-13 11:24         ` AngeloGioacchino Del Regno
2022-12-01  8:42 ` [PATCH 2/4] arm64: dts: mediatek: mt8192: " Chen-Yu Tsai
2022-12-01  8:42   ` Chen-Yu Tsai
2022-12-13 11:25   ` AngeloGioacchino Del Regno
2022-12-13 11:25     ` AngeloGioacchino Del Regno
2022-12-01  8:42 ` [PATCH 3/4] arm64: dts: mediatek: mt8195: " Chen-Yu Tsai
2022-12-01  8:42   ` Chen-Yu Tsai
2022-12-13 11:25   ` AngeloGioacchino Del Regno
2022-12-13 11:25     ` AngeloGioacchino Del Regno
2022-12-01  8:42 ` [PATCH 4/4] arm64: dts: mediatek: mt8186: " Chen-Yu Tsai
2022-12-01  8:42   ` Chen-Yu Tsai
2022-12-13 11:25   ` AngeloGioacchino Del Regno
2022-12-13 11:25     ` AngeloGioacchino Del Regno
2022-12-16 11:29 ` [PATCH 0/4] arm64: dts: mediatek: Fix systimer " Matthias Brugger
2022-12-16 11:29   ` Matthias Brugger

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