From: Marco Felsch <m.felsch@pengutronix.de>
To: abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
shawnguo@kernel.org, festevam@gmail.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, Anson.Huang@nxp.com
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, kernel@pengutronix.de
Subject: [PATCH 1/2] clk: imx8mp: fix sai4 clock
Date: Mon, 19 Dec 2022 18:10:57 +0100 [thread overview]
Message-ID: <20221219171058.164381-1-m.felsch@pengutronix.de> (raw)
The reference manual don't mention a SAI4 hardware block. This would be
clock slice 78 which is skipped (TRM, page 237). Remove any reference to
this clock to align the driver with the reality.
Fixes: 9c140d992676 ("clk: imx: Add support for i.MX8MP clock driver")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
drivers/clk/imx/clk-imx8mp.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 652ae58c2735..c161a18a8130 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -176,10 +176,6 @@ static const char * const imx8mp_sai3_sels[] = {"osc_24m", "audio_pll1_out", "au
"video_pll1_out", "sys_pll1_133m", "osc_hdmi",
"clk_ext3", "clk_ext4", };
-static const char * const imx8mp_sai4_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
- "video_pll1_out", "sys_pll1_133m", "osc_hdmi",
- "clk_ext1", "clk_ext2", };
-
static const char * const imx8mp_sai5_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
"video_pll1_out", "sys_pll1_133m", "osc_hdmi",
"clk_ext2", "clk_ext3", };
@@ -568,7 +564,6 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mp_sai1_sels, ccm_base + 0xa580);
hws[IMX8MP_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mp_sai2_sels, ccm_base + 0xa600);
hws[IMX8MP_CLK_SAI3] = imx8m_clk_hw_composite("sai3", imx8mp_sai3_sels, ccm_base + 0xa680);
- hws[IMX8MP_CLK_SAI4] = imx8m_clk_hw_composite("sai4", imx8mp_sai4_sels, ccm_base + 0xa700);
hws[IMX8MP_CLK_SAI5] = imx8m_clk_hw_composite("sai5", imx8mp_sai5_sels, ccm_base + 0xa780);
hws[IMX8MP_CLK_SAI6] = imx8m_clk_hw_composite("sai6", imx8mp_sai6_sels, ccm_base + 0xa800);
hws[IMX8MP_CLK_ENET_QOS] = imx8m_clk_hw_composite("enet_qos", imx8mp_enet_qos_sels, ccm_base + 0xa880);
--
2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Marco Felsch <m.felsch@pengutronix.de>
To: abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
shawnguo@kernel.org, festevam@gmail.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, Anson.Huang@nxp.com
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, kernel@pengutronix.de
Subject: [PATCH 1/2] clk: imx8mp: fix sai4 clock
Date: Mon, 19 Dec 2022 18:10:57 +0100 [thread overview]
Message-ID: <20221219171058.164381-1-m.felsch@pengutronix.de> (raw)
The reference manual don't mention a SAI4 hardware block. This would be
clock slice 78 which is skipped (TRM, page 237). Remove any reference to
this clock to align the driver with the reality.
Fixes: 9c140d992676 ("clk: imx: Add support for i.MX8MP clock driver")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
drivers/clk/imx/clk-imx8mp.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 652ae58c2735..c161a18a8130 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -176,10 +176,6 @@ static const char * const imx8mp_sai3_sels[] = {"osc_24m", "audio_pll1_out", "au
"video_pll1_out", "sys_pll1_133m", "osc_hdmi",
"clk_ext3", "clk_ext4", };
-static const char * const imx8mp_sai4_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
- "video_pll1_out", "sys_pll1_133m", "osc_hdmi",
- "clk_ext1", "clk_ext2", };
-
static const char * const imx8mp_sai5_sels[] = {"osc_24m", "audio_pll1_out", "audio_pll2_out",
"video_pll1_out", "sys_pll1_133m", "osc_hdmi",
"clk_ext2", "clk_ext3", };
@@ -568,7 +564,6 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_SAI1] = imx8m_clk_hw_composite("sai1", imx8mp_sai1_sels, ccm_base + 0xa580);
hws[IMX8MP_CLK_SAI2] = imx8m_clk_hw_composite("sai2", imx8mp_sai2_sels, ccm_base + 0xa600);
hws[IMX8MP_CLK_SAI3] = imx8m_clk_hw_composite("sai3", imx8mp_sai3_sels, ccm_base + 0xa680);
- hws[IMX8MP_CLK_SAI4] = imx8m_clk_hw_composite("sai4", imx8mp_sai4_sels, ccm_base + 0xa700);
hws[IMX8MP_CLK_SAI5] = imx8m_clk_hw_composite("sai5", imx8mp_sai5_sels, ccm_base + 0xa780);
hws[IMX8MP_CLK_SAI6] = imx8m_clk_hw_composite("sai6", imx8mp_sai6_sels, ccm_base + 0xa800);
hws[IMX8MP_CLK_ENET_QOS] = imx8m_clk_hw_composite("enet_qos", imx8mp_enet_qos_sels, ccm_base + 0xa880);
--
2.30.2
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next reply other threads:[~2022-12-19 17:11 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-19 17:10 Marco Felsch [this message]
2022-12-19 17:10 ` [PATCH 1/2] clk: imx8mp: fix sai4 clock Marco Felsch
2022-12-19 17:10 ` [PATCH 2/2] dt-bindings: clocks: imx8mp: make sai4 a dummy clock Marco Felsch
2022-12-19 17:10 ` Marco Felsch
2022-12-20 20:01 ` Rob Herring
2022-12-20 20:01 ` Rob Herring
2023-01-12 23:55 ` Stephen Boyd
2023-01-12 23:55 ` Stephen Boyd
2023-01-12 23:55 ` [PATCH 1/2] clk: imx8mp: fix sai4 clock Stephen Boyd
2023-01-12 23:55 ` Stephen Boyd
2023-04-21 9:16 ` Marco Felsch
2023-04-21 9:16 ` Marco Felsch
2023-06-12 19:29 ` Stephen Boyd
2023-06-12 19:29 ` Stephen Boyd
2023-07-31 14:24 ` Marco Felsch
2023-07-31 14:24 ` Marco Felsch
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