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From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com, wenrui.li@rock-chips.com,
	rick.wertenbroek@heig-vd.ch,
	"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jani Nikula" <jani.nikula@intel.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: [PATCH 3/8] PCI: rockchip: Fixed endpoint controller Configuration Request Retry Status
Date: Thu, 26 Jan 2023 14:50:43 +0100	[thread overview]
Message-ID: <20230126135049.708524-4-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230126135049.708524-1-rick.wertenbroek@gmail.com>

The endpoint was left in the config mode after probe, this would mean the
core would send configuration requestion retry status (CRS) messages back
to the root complex. The conf_en bit should be asserted after probe. This
is documented in section 17.5.8.1.2 of the RK3399 TRM.

Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 9b835377b..4c84e403e 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -623,6 +623,8 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
 
 	ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;
 
+	rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE, PCIE_CLIENT_CONFIG);
+
 	return 0;
 err_epc_mem_exit:
 	pci_epc_mem_exit(epc);
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com, wenrui.li@rock-chips.com,
	rick.wertenbroek@heig-vd.ch,
	"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jani Nikula" <jani.nikula@intel.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: [PATCH 3/8] PCI: rockchip: Fixed endpoint controller Configuration Request Retry Status
Date: Thu, 26 Jan 2023 14:50:43 +0100	[thread overview]
Message-ID: <20230126135049.708524-4-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230126135049.708524-1-rick.wertenbroek@gmail.com>

The endpoint was left in the config mode after probe, this would mean the
core would send configuration requestion retry status (CRS) messages back
to the root complex. The conf_en bit should be asserted after probe. This
is documented in section 17.5.8.1.2 of the RK3399 TRM.

Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 9b835377b..4c84e403e 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -623,6 +623,8 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
 
 	ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;
 
+	rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE, PCIE_CLIENT_CONFIG);
+
 	return 0;
 err_epc_mem_exit:
 	pci_epc_mem_exit(epc);
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com, wenrui.li@rock-chips.com,
	rick.wertenbroek@heig-vd.ch,
	"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Shawn Lin" <shawn.lin@rock-chips.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Jani Nikula" <jani.nikula@intel.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: [PATCH 3/8] PCI: rockchip: Fixed endpoint controller Configuration Request Retry Status
Date: Thu, 26 Jan 2023 14:50:43 +0100	[thread overview]
Message-ID: <20230126135049.708524-4-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230126135049.708524-1-rick.wertenbroek@gmail.com>

The endpoint was left in the config mode after probe, this would mean the
core would send configuration requestion retry status (CRS) messages back
to the root complex. The conf_en bit should be asserted after probe. This
is documented in section 17.5.8.1.2 of the RK3399 TRM.

Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 9b835377b..4c84e403e 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -623,6 +623,8 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
 
 	ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;
 
+	rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE, PCIE_CLIENT_CONFIG);
+
 	return 0;
 err_epc_mem_exit:
 	pci_epc_mem_exit(epc);
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-01-26 13:52 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-26 13:50 [PATCH 0/8] PCI: rockchip: Fix PCIe endpoint controller driver Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 1/8] PCI: rockchip: Removed writes to unused registers Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 2/8] PCI: rockchip: Fixed setup of Device ID Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek [this message]
2023-01-26 13:50   ` [PATCH 3/8] PCI: rockchip: Fixed endpoint controller Configuration Request Retry Status Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 4/8] PCI: rockchip: Added poll and timeout to wait for PHY PLLs to be locked Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 14:42   ` Bjorn Helgaas
2023-01-26 14:42     ` Bjorn Helgaas
2023-01-26 14:42     ` Bjorn Helgaas
2023-01-26 13:50 ` [PATCH 5/8] PCI: rockchip: Added dtsi entry for PCIe endpoint controller Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 15:23   ` Krzysztof Kozlowski
2023-01-26 15:23     ` Krzysztof Kozlowski
2023-01-26 15:23     ` Krzysztof Kozlowski
2023-01-26 15:30     ` Rick Wertenbroek
2023-01-26 15:30       ` Rick Wertenbroek
2023-01-26 15:30       ` Rick Wertenbroek
2023-01-26 15:43       ` Krzysztof Kozlowski
2023-01-26 15:43         ` Krzysztof Kozlowski
2023-01-26 15:43         ` Krzysztof Kozlowski
2023-01-27  8:42   ` ALOK TIWARI
2023-01-27  8:42     ` ALOK TIWARI
2023-01-27  8:42     ` ALOK TIWARI
2023-01-30 13:52     ` Rick Wertenbroek
2023-01-30 13:52       ` Rick Wertenbroek
2023-01-30 13:52       ` Rick Wertenbroek
2023-01-30 15:04   ` Rob Herring
2023-01-30 15:04     ` Rob Herring
2023-01-30 15:04     ` Rob Herring
2023-01-26 13:50 ` [PATCH 6/8] PCI: rockchip: Fixed window mapping and address translation for endpoint Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 7/8] PCI: rockchip: Fixed legacy IRQ generation " Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 15:25   ` Krzysztof Kozlowski
2023-01-26 15:25     ` Krzysztof Kozlowski
2023-01-26 15:25     ` Krzysztof Kozlowski
2023-01-28  9:19   ` kernel test robot
2023-01-28  9:19     ` kernel test robot
2023-01-28  9:19     ` kernel test robot
2023-01-26 13:50 ` [PATCH 8/8] PCI: rockchip: Fixed MSI generation from PCIe endpoint core Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 13:50   ` Rick Wertenbroek
2023-01-26 15:26   ` Krzysztof Kozlowski
2023-01-26 15:26     ` Krzysztof Kozlowski
2023-01-26 15:26     ` Krzysztof Kozlowski
2023-01-26 14:52 ` [PATCH 0/8] PCI: rockchip: Fix PCIe endpoint controller driver Bjorn Helgaas
2023-01-26 14:52   ` Bjorn Helgaas
2023-01-26 14:52   ` Bjorn Helgaas
2023-01-26 15:23   ` Rick Wertenbroek
2023-01-26 15:23     ` Rick Wertenbroek
2023-01-26 15:23     ` Rick Wertenbroek
2023-01-26 15:49     ` Bjorn Helgaas
2023-01-26 15:49       ` Bjorn Helgaas
2023-01-26 15:49       ` Bjorn Helgaas

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