From: Miquel Raynal <miquel.raynal@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <tudor.ambarus@linaro.org>, Pratyush Yadav <pratyush@kernel.org>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org> Cc: Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Jaime Liao <jaimeliao.tw@gmail.com>, Alvin Zhou <alvinzhou@mxic.com.tw>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Michal Simek <monstr@monstr.eu>, <linux-arm-kernel@lists.infradead.org>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v4 6/8] mtd: spi-nor: Add a RWW flag Date: Wed, 1 Feb 2023 12:36:01 +0100 [thread overview] Message-ID: <20230201113603.293758-7-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20230201113603.293758-1-miquel.raynal@bootlin.com> Introduce a new (no SFDP) flag for the feature that we are about to support: Read While Write. This means, if the chip has several banks and supports RWW, once a page of data to write has been transferred into the chip's internal SRAM, another read operation happening on a different bank can be performed during the tPROG delay. Adding this new flag involves enlarging the no_sfdp_flags variable to 16 bits. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/spi-nor/core.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 888a08c37d8c..aebd92f4884f 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -473,6 +473,7 @@ struct spi_nor_fixups { * SPI_NOR_OCTAL_READ: flash supports Octal Read. * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. + * SPI_NOR_RWW: flash supports reads while write. * * @fixup_flags: flags that indicate support that can be discovered via SFDP * ideally, but can not be discovered for this particular flash @@ -514,7 +515,7 @@ struct flash_info { #define SPI_NOR_NO_FR BIT(8) #define SPI_NOR_QUAD_PP BIT(9) - u8 no_sfdp_flags; + u16 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) #define SECT_4K BIT(1) #define SPI_NOR_DUAL_READ BIT(3) @@ -522,6 +523,7 @@ struct flash_info { #define SPI_NOR_OCTAL_READ BIT(5) #define SPI_NOR_OCTAL_DTR_READ BIT(6) #define SPI_NOR_OCTAL_DTR_PP BIT(7) +#define SPI_NOR_RWW BIT(8) u8 fixup_flags; #define SPI_NOR_4B_OPCODES BIT(0) -- 2.34.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com> To: Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <tudor.ambarus@linaro.org>, Pratyush Yadav <pratyush@kernel.org>, Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org> Cc: Julien Su <juliensu@mxic.com.tw>, Jaime Liao <jaimeliao@mxic.com.tw>, Jaime Liao <jaimeliao.tw@gmail.com>, Alvin Zhou <alvinzhou@mxic.com.tw>, Thomas Petazzoni <thomas.petazzoni@bootlin.com>, Michal Simek <monstr@monstr.eu>, <linux-arm-kernel@lists.infradead.org>, Miquel Raynal <miquel.raynal@bootlin.com> Subject: [PATCH v4 6/8] mtd: spi-nor: Add a RWW flag Date: Wed, 1 Feb 2023 12:36:01 +0100 [thread overview] Message-ID: <20230201113603.293758-7-miquel.raynal@bootlin.com> (raw) In-Reply-To: <20230201113603.293758-1-miquel.raynal@bootlin.com> Introduce a new (no SFDP) flag for the feature that we are about to support: Read While Write. This means, if the chip has several banks and supports RWW, once a page of data to write has been transferred into the chip's internal SRAM, another read operation happening on a different bank can be performed during the tPROG delay. Adding this new flag involves enlarging the no_sfdp_flags variable to 16 bits. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/spi-nor/core.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 888a08c37d8c..aebd92f4884f 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -473,6 +473,7 @@ struct spi_nor_fixups { * SPI_NOR_OCTAL_READ: flash supports Octal Read. * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. + * SPI_NOR_RWW: flash supports reads while write. * * @fixup_flags: flags that indicate support that can be discovered via SFDP * ideally, but can not be discovered for this particular flash @@ -514,7 +515,7 @@ struct flash_info { #define SPI_NOR_NO_FR BIT(8) #define SPI_NOR_QUAD_PP BIT(9) - u8 no_sfdp_flags; + u16 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) #define SECT_4K BIT(1) #define SPI_NOR_DUAL_READ BIT(3) @@ -522,6 +523,7 @@ struct flash_info { #define SPI_NOR_OCTAL_READ BIT(5) #define SPI_NOR_OCTAL_DTR_READ BIT(6) #define SPI_NOR_OCTAL_DTR_PP BIT(7) +#define SPI_NOR_RWW BIT(8) u8 fixup_flags; #define SPI_NOR_4B_OPCODES BIT(0) -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-02-01 11:40 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-02-01 11:35 [PATCH v4 0/8] mtd: spi-nor: read while write support Miquel Raynal 2023-02-01 11:35 ` Miquel Raynal 2023-02-01 11:35 ` [PATCH v4 1/8] mtd: spi-nor: Introduce the concept of bank Miquel Raynal 2023-02-01 11:35 ` Miquel Raynal 2023-03-17 3:36 ` Tudor Ambarus 2023-03-17 3:36 ` Tudor Ambarus 2023-02-01 11:35 ` [PATCH v4 2/8] mtd: spi-nor: Add a macro to define more banks Miquel Raynal 2023-02-01 11:35 ` Miquel Raynal 2023-02-01 11:35 ` [PATCH v4 3/8] mtd: spi-nor: Reorder the preparation vs locking steps Miquel Raynal 2023-02-01 11:35 ` Miquel Raynal 2023-03-17 3:39 ` Tudor Ambarus 2023-03-17 3:39 ` Tudor Ambarus 2023-03-17 3:51 ` Tudor Ambarus 2023-03-17 3:51 ` Tudor Ambarus 2023-03-24 15:28 ` Miquel Raynal 2023-03-24 15:28 ` Miquel Raynal 2023-02-01 11:35 ` [PATCH v4 4/8] mtd: spi-nor: Separate preparation and locking Miquel Raynal 2023-02-01 11:35 ` Miquel Raynal 2023-02-01 11:36 ` [PATCH v4 5/8] mtd: spi-nor: Prepare the introduction of a new locking mechanism Miquel Raynal 2023-02-01 11:36 ` Miquel Raynal 2023-02-01 11:36 ` Miquel Raynal [this message] 2023-02-01 11:36 ` [PATCH v4 6/8] mtd: spi-nor: Add a RWW flag Miquel Raynal 2023-03-17 3:20 ` Tudor Ambarus 2023-03-17 3:20 ` Tudor Ambarus 2023-02-01 11:36 ` [PATCH v4 7/8] mtd: spi-nor: Enhance locking to support reads while writes Miquel Raynal 2023-02-01 11:36 ` Miquel Raynal 2023-03-17 5:59 ` Tudor Ambarus 2023-03-17 5:59 ` Tudor Ambarus 2023-03-24 17:41 ` Miquel Raynal 2023-03-24 17:41 ` Miquel Raynal 2023-03-27 9:29 ` Tudor Ambarus 2023-03-27 9:29 ` Tudor Ambarus 2023-03-28 8:22 ` Miquel Raynal 2023-03-28 8:22 ` Miquel Raynal 2023-02-01 11:36 ` [PATCH v4 8/8] mtd: spi-nor: macronix: Add support for mx25uw51245g with RWW Miquel Raynal 2023-02-01 11:36 ` Miquel Raynal 2023-03-17 6:09 ` Tudor Ambarus 2023-03-17 6:09 ` Tudor Ambarus 2023-03-17 7:43 ` liao jaime 2023-03-17 7:43 ` liao jaime 2023-03-17 8:22 ` Tudor Ambarus 2023-03-17 8:22 ` Tudor Ambarus 2023-03-17 4:13 ` [PATCH v4 0/8] mtd: spi-nor: read while write support Tudor Ambarus 2023-03-17 4:13 ` Tudor Ambarus 2023-03-24 13:51 ` Miquel Raynal 2023-03-24 13:51 ` Miquel Raynal 2023-03-27 9:34 ` Tudor Ambarus 2023-03-27 9:34 ` Tudor Ambarus
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