From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-pm@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pengutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH v3 09/19] PM / devfreq: rockchip-dfi: Clean up DDR type register defines
Date: Thu, 16 Feb 2023 11:36:14 +0100 [thread overview]
Message-ID: <20230216103624.591901-10-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230216103624.591901-1-s.hauer@pengutronix.de>
Use the HIWORD_UPDATE() define known from other rockchip drivers to
make the defines look less odd to the readers who've seen other
rockchip drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/devfreq/event/rockchip-dfi.c | 32 +++++++++++++++++-----------
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 7896cd8beb143..035984d3c7b01 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -26,15 +26,19 @@
#define DMC_MAX_CHANNELS 2
+#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16)
+
/* DDRMON_CTRL */
#define DDRMON_CTRL 0x04
-#define CLR_DDRMON_CTRL (0x1f0000 << 0)
-#define LPDDR4_EN (0x10001 << 4)
-#define HARDWARE_EN (0x10001 << 3)
-#define LPDDR3_EN (0x10001 << 2)
-#define SOFTWARE_EN (0x10001 << 1)
-#define SOFTWARE_DIS (0x10000 << 1)
-#define TIME_CNT_EN (0x10001 << 0)
+#define DDRMON_CTRL_DDR4 BIT(5)
+#define DDRMON_CTRL_LPDDR4 BIT(4)
+#define DDRMON_CTRL_HARDWARE_EN BIT(3)
+#define DDRMON_CTRL_LPDDR23 BIT(2)
+#define DDRMON_CTRL_SOFTWARE_EN BIT(1)
+#define DDRMON_CTRL_TIMER_CNT_EN BIT(0)
+#define DDRMON_CTRL_DDR_TYPE_MASK (DDRMON_CTRL_DDR4 | \
+ DDRMON_CTRL_LPDDR4 | \
+ DDRMON_CTRL_LPDDR23)
#define DDRMON_CH0_COUNT_NUM 0x28
#define DDRMON_CH0_DFI_ACCESS_NUM 0x2c
@@ -74,16 +78,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
void __iomem *dfi_regs = dfi->regs;
/* clear DDRMON_CTRL setting */
- writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL);
/* set ddr type to dfi */
if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
- writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK),
+ dfi_regs + DDRMON_CTRL);
else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
- writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK),
+ dfi_regs + DDRMON_CTRL);
/* enable count, use software mode */
- writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN),
+ dfi_regs + DDRMON_CTRL);
}
static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
@@ -91,7 +98,8 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
void __iomem *dfi_regs = dfi->regs;
- writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN),
+ dfi_regs + DDRMON_CTRL);
}
static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count)
--
2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-pm@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pengutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH v3 09/19] PM / devfreq: rockchip-dfi: Clean up DDR type register defines
Date: Thu, 16 Feb 2023 11:36:14 +0100 [thread overview]
Message-ID: <20230216103624.591901-10-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230216103624.591901-1-s.hauer@pengutronix.de>
Use the HIWORD_UPDATE() define known from other rockchip drivers to
make the defines look less odd to the readers who've seen other
rockchip drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/devfreq/event/rockchip-dfi.c | 32 +++++++++++++++++-----------
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 7896cd8beb143..035984d3c7b01 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -26,15 +26,19 @@
#define DMC_MAX_CHANNELS 2
+#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16)
+
/* DDRMON_CTRL */
#define DDRMON_CTRL 0x04
-#define CLR_DDRMON_CTRL (0x1f0000 << 0)
-#define LPDDR4_EN (0x10001 << 4)
-#define HARDWARE_EN (0x10001 << 3)
-#define LPDDR3_EN (0x10001 << 2)
-#define SOFTWARE_EN (0x10001 << 1)
-#define SOFTWARE_DIS (0x10000 << 1)
-#define TIME_CNT_EN (0x10001 << 0)
+#define DDRMON_CTRL_DDR4 BIT(5)
+#define DDRMON_CTRL_LPDDR4 BIT(4)
+#define DDRMON_CTRL_HARDWARE_EN BIT(3)
+#define DDRMON_CTRL_LPDDR23 BIT(2)
+#define DDRMON_CTRL_SOFTWARE_EN BIT(1)
+#define DDRMON_CTRL_TIMER_CNT_EN BIT(0)
+#define DDRMON_CTRL_DDR_TYPE_MASK (DDRMON_CTRL_DDR4 | \
+ DDRMON_CTRL_LPDDR4 | \
+ DDRMON_CTRL_LPDDR23)
#define DDRMON_CH0_COUNT_NUM 0x28
#define DDRMON_CH0_DFI_ACCESS_NUM 0x2c
@@ -74,16 +78,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
void __iomem *dfi_regs = dfi->regs;
/* clear DDRMON_CTRL setting */
- writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL);
/* set ddr type to dfi */
if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
- writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK),
+ dfi_regs + DDRMON_CTRL);
else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
- writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK),
+ dfi_regs + DDRMON_CTRL);
/* enable count, use software mode */
- writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN),
+ dfi_regs + DDRMON_CTRL);
}
static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
@@ -91,7 +98,8 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
void __iomem *dfi_regs = dfi->regs;
- writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN),
+ dfi_regs + DDRMON_CTRL);
}
static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count)
--
2.30.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-pm@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pengutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH v3 09/19] PM / devfreq: rockchip-dfi: Clean up DDR type register defines
Date: Thu, 16 Feb 2023 11:36:14 +0100 [thread overview]
Message-ID: <20230216103624.591901-10-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230216103624.591901-1-s.hauer@pengutronix.de>
Use the HIWORD_UPDATE() define known from other rockchip drivers to
make the defines look less odd to the readers who've seen other
rockchip drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/devfreq/event/rockchip-dfi.c | 32 +++++++++++++++++-----------
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 7896cd8beb143..035984d3c7b01 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -26,15 +26,19 @@
#define DMC_MAX_CHANNELS 2
+#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16)
+
/* DDRMON_CTRL */
#define DDRMON_CTRL 0x04
-#define CLR_DDRMON_CTRL (0x1f0000 << 0)
-#define LPDDR4_EN (0x10001 << 4)
-#define HARDWARE_EN (0x10001 << 3)
-#define LPDDR3_EN (0x10001 << 2)
-#define SOFTWARE_EN (0x10001 << 1)
-#define SOFTWARE_DIS (0x10000 << 1)
-#define TIME_CNT_EN (0x10001 << 0)
+#define DDRMON_CTRL_DDR4 BIT(5)
+#define DDRMON_CTRL_LPDDR4 BIT(4)
+#define DDRMON_CTRL_HARDWARE_EN BIT(3)
+#define DDRMON_CTRL_LPDDR23 BIT(2)
+#define DDRMON_CTRL_SOFTWARE_EN BIT(1)
+#define DDRMON_CTRL_TIMER_CNT_EN BIT(0)
+#define DDRMON_CTRL_DDR_TYPE_MASK (DDRMON_CTRL_DDR4 | \
+ DDRMON_CTRL_LPDDR4 | \
+ DDRMON_CTRL_LPDDR23)
#define DDRMON_CH0_COUNT_NUM 0x28
#define DDRMON_CH0_DFI_ACCESS_NUM 0x2c
@@ -74,16 +78,19 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
void __iomem *dfi_regs = dfi->regs;
/* clear DDRMON_CTRL setting */
- writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(0, 0xffff), dfi_regs + DDRMON_CTRL);
/* set ddr type to dfi */
if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
- writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK),
+ dfi_regs + DDRMON_CTRL);
else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
- writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK),
+ dfi_regs + DDRMON_CTRL);
/* enable count, use software mode */
- writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN),
+ dfi_regs + DDRMON_CTRL);
}
static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
@@ -91,7 +98,8 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
void __iomem *dfi_regs = dfi->regs;
- writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
+ writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN),
+ dfi_regs + DDRMON_CTRL);
}
static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count)
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-02-16 10:37 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 10:36 [PATCH v3 00/19] Add perf support to the rockchip-dfi driver Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 01/19] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 02/19] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 03/19] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 04/19] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 05/19] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 06/19] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 07/19] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 08/19] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer [this message]
2023-02-16 10:36 ` [PATCH v3 09/19] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 10/19] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 11/19] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 12/19] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 13/19] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 14/19] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 15/19] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 16/19] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 17/19] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 18/19] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` [PATCH v3 19/19] dt-bindings: devfreq: event: rockchip,dfi: Add rk3568 support Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-02-16 10:36 ` Sascha Hauer
2023-03-06 13:25 ` [PATCH v3 00/19] Add perf support to the rockchip-dfi driver Sascha Hauer
2023-03-06 13:25 ` Sascha Hauer
2023-03-06 13:25 ` Sascha Hauer
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