From: Yong Wu <yong.wu@mediatek.com> To: Joerg Roedel <joro@8bytes.org>, Matthias Brugger <matthias.bgg@gmail.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh+dt@kernel.org> Cc: Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Hans Verkuil <hverkuil@xs4all.nl>, <nfraprado@collabora.com>, <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, <mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>, <jianjiao.zeng@mediatek.com>, Yunfei Dong <yunfei.dong@mediatek.com>, kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>, <chengci.xu@mediatek.com>, <youlin.pei@mediatek.com>, <anan.sun@mediatek.com>, Yong Wu <yong.wu@mediatek.com> Subject: [PATCH v5 05/11] iommu/mediatek: mt8192: Add iova_region_larb_msk Date: Tue, 7 Mar 2023 10:35:01 +0800 [thread overview] Message-ID: <20230307023507.13306-6-yong.wu@mediatek.com> (raw) In-Reply-To: <20230307023507.13306-1-yong.wu@mediatek.com> Add iova_region_larb_msk for mt8192. We separate the 16GB iova regions by each device's larbid/portid. Note: larb3/6/8/10/12/15 connect nothing in this SoC. Refer to the comment in include/dt-bindings/memory/mt8192-larb-port.h Define a new macro MT8192_MULTI_REGION_NR_MAX to indicate the index of mt8xxx_larb_region_msk and "struct mtk_iommu_iova_region mt8192_multi_dom" are the same. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/iommu/mtk_iommu.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 89a80982b7d1..710a3239fd3d 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -336,7 +336,12 @@ static const struct mtk_iommu_iova_region single_domain[] = { {.iova_base = 0, .size = SZ_4G}, }; -static const struct mtk_iommu_iova_region mt8192_multi_dom[] = { +#define MT8192_MULTI_REGION_NR_MAX 6 + +#define MT8192_MULTI_REGION_NR (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) ? \ + MT8192_MULTI_REGION_NR_MAX : 1) + +static const struct mtk_iommu_iova_region mt8192_multi_dom[MT8192_MULTI_REGION_NR] = { { .iova_base = 0x0, .size = SZ_4G}, /* 0 ~ 4G */ #if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) { .iova_base = SZ_4G, .size = SZ_4G}, /* 4G ~ 8G */ @@ -1538,6 +1543,17 @@ static const struct mtk_iommu_plat_data mt8186_data_mm = { .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), }; +static const unsigned int mt8192_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = { + [0] = {~0, ~0}, /* Region0: larb0/1 */ + [1] = {0, 0, 0, 0, ~0, ~0, 0, ~0}, /* Region1: larb4/5/7 */ + [2] = {0, 0, ~0, 0, 0, 0, 0, 0, /* Region2: larb2/9/11/13/14/16/17/18/19/20 */ + 0, ~0, 0, ~0, 0, ~(u32)(BIT(9) | BIT(10)), ~(u32)(BIT(4) | BIT(5)), 0, + ~0, ~0, ~0, ~0, ~0}, + [3] = {0}, + [4] = {[13] = BIT(9) | BIT(10)}, /* larb13 port9/10 */ + [5] = {[14] = BIT(4) | BIT(5)}, /* larb14 port4/5 */ +}; + static const struct mtk_iommu_plat_data mt8192_data = { .m4u_plat = M4U_MT8192, .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | @@ -1547,6 +1563,7 @@ static const struct mtk_iommu_plat_data mt8192_data = { .banks_enable = {true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), + .iova_region_larb_msk = mt8192_larb_region_msk, .larbid_remap = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20}, {0, 14, 16}, {0, 13, 18, 17}}, }; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com> To: Joerg Roedel <joro@8bytes.org>, Matthias Brugger <matthias.bgg@gmail.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh+dt@kernel.org> Cc: Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Hans Verkuil <hverkuil@xs4all.nl>, <nfraprado@collabora.com>, <linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, <mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>, <jianjiao.zeng@mediatek.com>, Yunfei Dong <yunfei.dong@mediatek.com>, kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>, <chengci.xu@mediatek.com>, <youlin.pei@mediatek.com>, <anan.sun@mediatek.com>, Yong Wu <yong.wu@mediatek.com> Subject: [PATCH v5 05/11] iommu/mediatek: mt8192: Add iova_region_larb_msk Date: Tue, 7 Mar 2023 10:35:01 +0800 [thread overview] Message-ID: <20230307023507.13306-6-yong.wu@mediatek.com> (raw) In-Reply-To: <20230307023507.13306-1-yong.wu@mediatek.com> Add iova_region_larb_msk for mt8192. We separate the 16GB iova regions by each device's larbid/portid. Note: larb3/6/8/10/12/15 connect nothing in this SoC. Refer to the comment in include/dt-bindings/memory/mt8192-larb-port.h Define a new macro MT8192_MULTI_REGION_NR_MAX to indicate the index of mt8xxx_larb_region_msk and "struct mtk_iommu_iova_region mt8192_multi_dom" are the same. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/iommu/mtk_iommu.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 89a80982b7d1..710a3239fd3d 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -336,7 +336,12 @@ static const struct mtk_iommu_iova_region single_domain[] = { {.iova_base = 0, .size = SZ_4G}, }; -static const struct mtk_iommu_iova_region mt8192_multi_dom[] = { +#define MT8192_MULTI_REGION_NR_MAX 6 + +#define MT8192_MULTI_REGION_NR (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) ? \ + MT8192_MULTI_REGION_NR_MAX : 1) + +static const struct mtk_iommu_iova_region mt8192_multi_dom[MT8192_MULTI_REGION_NR] = { { .iova_base = 0x0, .size = SZ_4G}, /* 0 ~ 4G */ #if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) { .iova_base = SZ_4G, .size = SZ_4G}, /* 4G ~ 8G */ @@ -1538,6 +1543,17 @@ static const struct mtk_iommu_plat_data mt8186_data_mm = { .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), }; +static const unsigned int mt8192_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = { + [0] = {~0, ~0}, /* Region0: larb0/1 */ + [1] = {0, 0, 0, 0, ~0, ~0, 0, ~0}, /* Region1: larb4/5/7 */ + [2] = {0, 0, ~0, 0, 0, 0, 0, 0, /* Region2: larb2/9/11/13/14/16/17/18/19/20 */ + 0, ~0, 0, ~0, 0, ~(u32)(BIT(9) | BIT(10)), ~(u32)(BIT(4) | BIT(5)), 0, + ~0, ~0, ~0, ~0, ~0}, + [3] = {0}, + [4] = {[13] = BIT(9) | BIT(10)}, /* larb13 port9/10 */ + [5] = {[14] = BIT(4) | BIT(5)}, /* larb14 port4/5 */ +}; + static const struct mtk_iommu_plat_data mt8192_data = { .m4u_plat = M4U_MT8192, .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | @@ -1547,6 +1563,7 @@ static const struct mtk_iommu_plat_data mt8192_data = { .banks_enable = {true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), + .iova_region_larb_msk = mt8192_larb_region_msk, .larbid_remap = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20}, {0, 14, 16}, {0, 13, 18, 17}}, }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-03-07 2:37 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-07 2:34 [PATCH v5 00/11] Adjust the dma-ranges for MTK IOMMU Yong Wu 2023-03-07 2:34 ` Yong Wu 2023-03-07 2:34 ` [PATCH v5 01/11] dt-bindings: media: mediatek,vcodec: Remove dma-ranges property Yong Wu 2023-03-07 2:34 ` Yong Wu 2023-03-13 11:51 ` Hans Verkuil 2023-03-13 11:51 ` Hans Verkuil 2023-03-07 2:34 ` [PATCH v5 02/11] dt-bindings: media: mediatek,jpeg: " Yong Wu 2023-03-07 2:34 ` Yong Wu 2023-03-13 11:51 ` Hans Verkuil 2023-03-13 11:51 ` Hans Verkuil 2023-03-07 2:34 ` [PATCH v5 03/11] iommu/mediatek: Improve comment for the current region/bank Yong Wu 2023-03-07 2:34 ` Yong Wu 2023-03-07 2:35 ` [PATCH v5 04/11] iommu/mediatek: Get regionid from larb/port id Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-07 2:35 ` Yong Wu [this message] 2023-03-07 2:35 ` [PATCH v5 05/11] iommu/mediatek: mt8192: Add iova_region_larb_msk Yong Wu 2023-03-07 2:35 ` [PATCH v5 06/11] iommu/mediatek: mt8195: " Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-07 2:35 ` [PATCH v5 07/11] iommu/mediatek: mt8186: " Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-07 2:35 ` [PATCH v5 08/11] iommu/mediatek: Add a gap for the iova regions Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-07 2:35 ` [PATCH v5 09/11] arm64: dts: mt8195: Add dma-ranges for the parent "soc" node Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-07 2:35 ` [PATCH v5 10/11] arm64: dts: mt8195: Remove the unnecessary dma-ranges Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-07 2:35 ` [PATCH v5 11/11] arm64: dts: mt8186: Add dma-ranges for the parent "soc" node Yong Wu 2023-03-07 2:35 ` Yong Wu 2023-03-21 8:54 ` [PATCH v5 00/11] Adjust the dma-ranges for MTK IOMMU Hans Verkuil 2023-03-21 8:54 ` Hans Verkuil
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