From: Tinghan Shen <tinghan.shen@mediatek.com> To: Bjorn Andersson <andersson@kernel.org>, Mathieu Poirier <mathieu.poirier@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Tinghan Shen <tinghan.shen@mediatek.com> Cc: <linux-remoteproc@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com> Subject: [PATCH v12 11/11] arm64: dts: mediatek: mt8195: Add SCP 2nd core Date: Wed, 17 May 2023 12:34:49 +0800 [thread overview] Message-ID: <20230517043449.26352-12-tinghan.shen@mediatek.com> (raw) In-Reply-To: <20230517043449.26352-1-tinghan.shen@mediatek.com> Rewrite the MT8195 SCP device node as a cluster and add the SCP 2nd core in it. Since the SCP device node is changed to multi-core structure, enable SCP cluster to enable probing SCP core 0. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 6 +++- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 32 ++++++++++++++----- 2 files changed, 29 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 8ac80a136c37..8addb94a24a1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -962,7 +962,11 @@ interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; -&scp { +&scp_cluster { + status = "okay"; +}; + +&scp_c0 { status = "okay"; firmware-name = "mediatek/mt8195/scp.img"; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index a44aae4ab953..10947b4b4707 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -916,14 +916,30 @@ clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>; }; - scp: scp@10500000 { - compatible = "mediatek,mt8195-scp"; - reg = <0 0x10500000 0 0x100000>, - <0 0x10720000 0 0xe0000>, - <0 0x10700000 0 0x8000>; - reg-names = "sram", "cfg", "l1tcm"; - interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>; + scp_cluster: scp@10500000 { + compatible = "mediatek,mt8195-scp-dual"; + reg = <0 0x10720000 0 0xe0000>, <0 0x10700000 0 0x8000>; + reg-names = "cfg", "l1tcm"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x10500000 0x100000>; status = "disabled"; + + scp_c0: scp@0 { + compatible = "mediatek,scp-core"; + reg = <0x0 0xa0000>; + reg-names = "sram"; + interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; + + scp_c1: scp@a0000 { + compatible = "mediatek,scp-core"; + reg = <0xa0000 0x20000>; + reg-names = "sram"; + interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; }; scp_adsp: clock-controller@10720000 { @@ -2464,7 +2480,7 @@ <&iommu_vdo M4U_PORT_L19_VENC_REF_LUMA>, <&iommu_vdo M4U_PORT_L19_VENC_REF_CHROMA>; interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>; - mediatek,scp = <&scp>; + mediatek,scp = <&scp_c0>; clocks = <&vencsys CLK_VENC_VENC>; clock-names = "venc_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC>; -- 2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Tinghan Shen <tinghan.shen@mediatek.com> To: Bjorn Andersson <andersson@kernel.org>, Mathieu Poirier <mathieu.poirier@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Tinghan Shen <tinghan.shen@mediatek.com> Cc: <linux-remoteproc@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com> Subject: [PATCH v12 11/11] arm64: dts: mediatek: mt8195: Add SCP 2nd core Date: Wed, 17 May 2023 12:34:49 +0800 [thread overview] Message-ID: <20230517043449.26352-12-tinghan.shen@mediatek.com> (raw) In-Reply-To: <20230517043449.26352-1-tinghan.shen@mediatek.com> Rewrite the MT8195 SCP device node as a cluster and add the SCP 2nd core in it. Since the SCP device node is changed to multi-core structure, enable SCP cluster to enable probing SCP core 0. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 6 +++- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 32 ++++++++++++++----- 2 files changed, 29 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 8ac80a136c37..8addb94a24a1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -962,7 +962,11 @@ interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; -&scp { +&scp_cluster { + status = "okay"; +}; + +&scp_c0 { status = "okay"; firmware-name = "mediatek/mt8195/scp.img"; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index a44aae4ab953..10947b4b4707 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -916,14 +916,30 @@ clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>; }; - scp: scp@10500000 { - compatible = "mediatek,mt8195-scp"; - reg = <0 0x10500000 0 0x100000>, - <0 0x10720000 0 0xe0000>, - <0 0x10700000 0 0x8000>; - reg-names = "sram", "cfg", "l1tcm"; - interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>; + scp_cluster: scp@10500000 { + compatible = "mediatek,mt8195-scp-dual"; + reg = <0 0x10720000 0 0xe0000>, <0 0x10700000 0 0x8000>; + reg-names = "cfg", "l1tcm"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x10500000 0x100000>; status = "disabled"; + + scp_c0: scp@0 { + compatible = "mediatek,scp-core"; + reg = <0x0 0xa0000>; + reg-names = "sram"; + interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; + + scp_c1: scp@a0000 { + compatible = "mediatek,scp-core"; + reg = <0xa0000 0x20000>; + reg-names = "sram"; + interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>; + status = "disabled"; + }; }; scp_adsp: clock-controller@10720000 { @@ -2464,7 +2480,7 @@ <&iommu_vdo M4U_PORT_L19_VENC_REF_LUMA>, <&iommu_vdo M4U_PORT_L19_VENC_REF_CHROMA>; interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>; - mediatek,scp = <&scp>; + mediatek,scp = <&scp_c0>; clocks = <&vencsys CLK_VENC_VENC>; clock-names = "venc_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC>; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-05-17 4:35 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-17 4:34 [PATCH v12 00/11] Add support for MT8195 SCP 2nd core Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 01/11] dt-bindings: remoteproc: mediatek: Improve the rpmsg subnode definition Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 02/11] arm64: dts: mediatek: Update the node name of SCP rpmsg subnode Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 03/11] dt-bindings: remoteproc: mediatek: Support MT8195 dual-core SCP Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-29 14:10 ` Matthias Brugger 2023-05-29 14:10 ` Matthias Brugger 2023-05-17 4:34 ` [PATCH v12 04/11] remoteproc: mediatek: Add MT8195 SCP core 1 operations Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 05/11] remoteproc: mediatek: Introduce cluster on single-core SCP Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 06/11] remoteproc: mediatek: Probe multi-core SCP Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 17:36 ` Mathieu Poirier 2023-05-17 17:36 ` Mathieu Poirier 2023-05-17 4:34 ` [PATCH v12 07/11] remoteproc: mediatek: Control SCP core 1 by rproc subdevice Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 17:58 ` Mathieu Poirier 2023-05-17 17:58 ` Mathieu Poirier 2023-05-18 11:50 ` Dan Carpenter 2023-05-18 11:50 ` Dan Carpenter 2023-05-17 4:34 ` [PATCH v12 08/11] remoteproc: mediatek: Setup MT8195 SCP core 1 SRAM offset Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 09/11] remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` [PATCH v12 10/11] remoteproc: mediatek: Refine ipi handler error message Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen 2023-05-17 4:34 ` Tinghan Shen [this message] 2023-05-17 4:34 ` [PATCH v12 11/11] arm64: dts: mediatek: mt8195: Add SCP 2nd core Tinghan Shen
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