From: Jonathan Cameron <Jonathan.Cameron@Huawei.com> To: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-rockchip@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, Heiko Stuebner <heiko@sntech.de>, Kyungmin Park <kyungmin.park@samsung.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>, <kernel@pengutronix.de>, Michael Riesch <michael.riesch@wolfvision.net> Subject: Re: [PATCH v4 18/21] PM / devfreq: rockchip-dfi: add support for RK3588 Date: Wed, 17 May 2023 11:24:48 +0100 [thread overview] Message-ID: <20230517112448.00005538@Huawei.com> (raw) In-Reply-To: <20230505113856.463650-19-s.hauer@pengutronix.de> On Fri, 5 May 2023 13:38:53 +0200 Sascha Hauer <s.hauer@pengutronix.de> wrote: > Add support for the RK3588 to the driver. The RK3588 has four DDR > channels with a register stride of 0x4000 between the channel > registers, also it has a DDRMON_CTRL register per channel. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> No idea if registers are right as I've not checked any datasheets, but the code looks fine to me. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/devfreq/event/rockchip-dfi.c | 34 +++++++++++++++++++++++++++- > include/soc/rockchip/rk3588_grf.h | 18 +++++++++++++++ > 2 files changed, 51 insertions(+), 1 deletion(-) > create mode 100644 include/soc/rockchip/rk3588_grf.h > > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c > index 74d69153e6386..3630981505c6d 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -25,8 +25,9 @@ > #include <soc/rockchip/rockchip_grf.h> > #include <soc/rockchip/rk3399_grf.h> > #include <soc/rockchip/rk3568_grf.h> > +#include <soc/rockchip/rk3588_grf.h> > > -#define DMC_MAX_CHANNELS 2 > +#define DMC_MAX_CHANNELS 4 > > #define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) > > @@ -616,6 +617,32 @@ static int rk3568_dfi_init(struct rockchip_dfi *dfi) > return 0; > }; > > +static int rk3588_dfi_init(struct rockchip_dfi *dfi) > +{ > + struct regmap *regmap_pmu = dfi->regmap_pmu; > + u32 reg2, reg3, reg4; > + > + regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG2, ®2); > + regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG3, ®3); > + regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG4, ®4); > + > + dfi->ddr_type = FIELD_GET(RK3588_PMUGRF_OS_REG2_DRAMTYPE_INFO, reg2); > + > + if (FIELD_GET(RK3588_PMUGRF_OS_REG3_SYSREG_VERSION, reg3) >= 0x3) > + dfi->ddr_type |= FIELD_GET(RK3588_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3, reg3) << 3; > + > + dfi->buswidth[0] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH0, reg2) == 0 ? 4 : 2; > + dfi->buswidth[1] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH1, reg2) == 0 ? 4 : 2; > + dfi->buswidth[2] = FIELD_GET(RK3568_PMUGRF_OS_REG2_BW_CH0, reg4) == 0 ? 4 : 2; > + dfi->buswidth[3] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH1, reg4) == 0 ? 4 : 2; > + dfi->channel_mask = FIELD_GET(RK3588_PMUGRF_OS_REG2_CH_INFO, reg2) | > + FIELD_GET(RK3588_PMUGRF_OS_REG2_CH_INFO, reg4) << 2; > + > + dfi->ddrmon_stride = 0x4000; > + > + return 0; > +}; > + > struct rockchip_dfi_devtype_data { > int (*init)(struct rockchip_dfi *dfi); > }; > @@ -628,9 +655,14 @@ static struct rockchip_dfi_devtype_data rk3568_devtype_data = { > .init = rk3568_dfi_init, > }; > > +static struct rockchip_dfi_devtype_data rk3588_devtype_data = { > + .init = rk3588_dfi_init, > +}; > + > static const struct of_device_id rockchip_dfi_id_match[] = { > { .compatible = "rockchip,rk3399-dfi", .data = &rk3399_devtype_data }, > { .compatible = "rockchip,rk3568-dfi", .data = &rk3568_devtype_data }, > + { .compatible = "rockchip,rk3588-dfi", .data = &rk3588_devtype_data }, > { }, > }; > MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); > diff --git a/include/soc/rockchip/rk3588_grf.h b/include/soc/rockchip/rk3588_grf.h > new file mode 100644 > index 0000000000000..630b35a550640 > --- /dev/null > +++ b/include/soc/rockchip/rk3588_grf.h > @@ -0,0 +1,18 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +#ifndef __SOC_RK3588_GRF_H > +#define __SOC_RK3588_GRF_H > + > +#define RK3588_PMUGRF_OS_REG2 0x208 > +#define RK3588_PMUGRF_OS_REG2_DRAMTYPE_INFO GENMASK(15, 13) > +#define RK3588_PMUGRF_OS_REG2_BW_CH0 GENMASK(3, 2) > +#define RK3588_PMUGRF_OS_REG2_BW_CH1 GENMASK(19, 18) > +#define RK3588_PMUGRF_OS_REG2_CH_INFO GENMASK(29, 28) > + > +#define RK3588_PMUGRF_OS_REG3 0x20c > +#define RK3588_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3 GENMASK(13, 12) > +#define RK3588_PMUGRF_OS_REG3_SYSREG_VERSION GENMASK(31, 28) > + > +#define RK3588_PMUGRF_OS_REG4 0x210 > +#define RK3588_PMUGRF_OS_REG5 0x214 > + > +#endif /* __SOC_RK3588_GRF_H */ _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com> To: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-rockchip@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, Heiko Stuebner <heiko@sntech.de>, Kyungmin Park <kyungmin.park@samsung.com>, MyungJoo Ham <myungjoo.ham@samsung.com>, Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>, <kernel@pengutronix.de>, Michael Riesch <michael.riesch@wolfvision.net> Subject: Re: [PATCH v4 18/21] PM / devfreq: rockchip-dfi: add support for RK3588 Date: Wed, 17 May 2023 11:24:48 +0100 [thread overview] Message-ID: <20230517112448.00005538@Huawei.com> (raw) In-Reply-To: <20230505113856.463650-19-s.hauer@pengutronix.de> On Fri, 5 May 2023 13:38:53 +0200 Sascha Hauer <s.hauer@pengutronix.de> wrote: > Add support for the RK3588 to the driver. The RK3588 has four DDR > channels with a register stride of 0x4000 between the channel > registers, also it has a DDRMON_CTRL register per channel. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> No idea if registers are right as I've not checked any datasheets, but the code looks fine to me. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > drivers/devfreq/event/rockchip-dfi.c | 34 +++++++++++++++++++++++++++- > include/soc/rockchip/rk3588_grf.h | 18 +++++++++++++++ > 2 files changed, 51 insertions(+), 1 deletion(-) > create mode 100644 include/soc/rockchip/rk3588_grf.h > > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c > index 74d69153e6386..3630981505c6d 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -25,8 +25,9 @@ > #include <soc/rockchip/rockchip_grf.h> > #include <soc/rockchip/rk3399_grf.h> > #include <soc/rockchip/rk3568_grf.h> > +#include <soc/rockchip/rk3588_grf.h> > > -#define DMC_MAX_CHANNELS 2 > +#define DMC_MAX_CHANNELS 4 > > #define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) > > @@ -616,6 +617,32 @@ static int rk3568_dfi_init(struct rockchip_dfi *dfi) > return 0; > }; > > +static int rk3588_dfi_init(struct rockchip_dfi *dfi) > +{ > + struct regmap *regmap_pmu = dfi->regmap_pmu; > + u32 reg2, reg3, reg4; > + > + regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG2, ®2); > + regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG3, ®3); > + regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG4, ®4); > + > + dfi->ddr_type = FIELD_GET(RK3588_PMUGRF_OS_REG2_DRAMTYPE_INFO, reg2); > + > + if (FIELD_GET(RK3588_PMUGRF_OS_REG3_SYSREG_VERSION, reg3) >= 0x3) > + dfi->ddr_type |= FIELD_GET(RK3588_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3, reg3) << 3; > + > + dfi->buswidth[0] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH0, reg2) == 0 ? 4 : 2; > + dfi->buswidth[1] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH1, reg2) == 0 ? 4 : 2; > + dfi->buswidth[2] = FIELD_GET(RK3568_PMUGRF_OS_REG2_BW_CH0, reg4) == 0 ? 4 : 2; > + dfi->buswidth[3] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH1, reg4) == 0 ? 4 : 2; > + dfi->channel_mask = FIELD_GET(RK3588_PMUGRF_OS_REG2_CH_INFO, reg2) | > + FIELD_GET(RK3588_PMUGRF_OS_REG2_CH_INFO, reg4) << 2; > + > + dfi->ddrmon_stride = 0x4000; > + > + return 0; > +}; > + > struct rockchip_dfi_devtype_data { > int (*init)(struct rockchip_dfi *dfi); > }; > @@ -628,9 +655,14 @@ static struct rockchip_dfi_devtype_data rk3568_devtype_data = { > .init = rk3568_dfi_init, > }; > > +static struct rockchip_dfi_devtype_data rk3588_devtype_data = { > + .init = rk3588_dfi_init, > +}; > + > static const struct of_device_id rockchip_dfi_id_match[] = { > { .compatible = "rockchip,rk3399-dfi", .data = &rk3399_devtype_data }, > { .compatible = "rockchip,rk3568-dfi", .data = &rk3568_devtype_data }, > + { .compatible = "rockchip,rk3588-dfi", .data = &rk3588_devtype_data }, > { }, > }; > MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); > diff --git a/include/soc/rockchip/rk3588_grf.h b/include/soc/rockchip/rk3588_grf.h > new file mode 100644 > index 0000000000000..630b35a550640 > --- /dev/null > +++ b/include/soc/rockchip/rk3588_grf.h > @@ -0,0 +1,18 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +#ifndef __SOC_RK3588_GRF_H > +#define __SOC_RK3588_GRF_H > + > +#define RK3588_PMUGRF_OS_REG2 0x208 > +#define RK3588_PMUGRF_OS_REG2_DRAMTYPE_INFO GENMASK(15, 13) > +#define RK3588_PMUGRF_OS_REG2_BW_CH0 GENMASK(3, 2) > +#define RK3588_PMUGRF_OS_REG2_BW_CH1 GENMASK(19, 18) > +#define RK3588_PMUGRF_OS_REG2_CH_INFO GENMASK(29, 28) > + > +#define RK3588_PMUGRF_OS_REG3 0x20c > +#define RK3588_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3 GENMASK(13, 12) > +#define RK3588_PMUGRF_OS_REG3_SYSREG_VERSION GENMASK(31, 28) > + > +#define RK3588_PMUGRF_OS_REG4 0x210 > +#define RK3588_PMUGRF_OS_REG5 0x214 > + > +#endif /* __SOC_RK3588_GRF_H */ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-05-17 10:25 UTC|newest] Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-05 11:38 [PATCH v4 00/21] Add perf support to the rockchip-dfi driver Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 01/21] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-07 10:08 ` Heiko Stübner 2023-05-07 10:08 ` Heiko Stübner 2023-05-16 15:12 ` Jonathan Cameron 2023-05-16 15:12 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 02/21] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-07 10:22 ` Heiko Stübner 2023-05-07 10:22 ` Heiko Stübner 2023-05-16 15:27 ` Jonathan Cameron 2023-05-16 15:27 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 03/21] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:33 ` Jonathan Cameron 2023-05-16 15:33 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 04/21] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:40 ` Jonathan Cameron 2023-05-16 15:40 ` Jonathan Cameron 2023-05-17 9:20 ` Sascha Hauer 2023-05-17 9:20 ` Sascha Hauer 2023-05-17 10:19 ` Jonathan Cameron 2023-05-17 10:19 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 05/21] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:43 ` Jonathan Cameron 2023-05-16 15:43 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 06/21] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:48 ` Jonathan Cameron 2023-05-16 15:48 ` Jonathan Cameron 2023-05-17 9:29 ` Sascha Hauer 2023-05-17 9:29 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 07/21] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:50 ` Jonathan Cameron 2023-05-16 15:50 ` Jonathan Cameron 2023-05-17 9:33 ` Sascha Hauer 2023-05-17 9:33 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 08/21] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 15:54 ` Jonathan Cameron 2023-05-16 15:54 ` Jonathan Cameron 2023-05-17 10:51 ` Sascha Hauer 2023-05-17 10:51 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 09/21] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:01 ` Jonathan Cameron 2023-05-16 16:01 ` Jonathan Cameron 2023-05-17 11:11 ` Sascha Hauer 2023-05-17 11:11 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 10/21] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:04 ` Jonathan Cameron 2023-05-16 16:04 ` Jonathan Cameron 2023-05-17 11:38 ` Sascha Hauer 2023-05-17 11:38 ` Sascha Hauer 2023-05-17 14:46 ` Jonathan Cameron 2023-05-17 14:46 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 11/21] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:06 ` Jonathan Cameron 2023-05-16 16:06 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 12/21] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:09 ` Jonathan Cameron 2023-05-16 16:09 ` Jonathan Cameron 2023-05-19 6:14 ` Sascha Hauer 2023-05-19 6:14 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 13/21] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:10 ` Jonathan Cameron 2023-05-16 16:10 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 14/21] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:16 ` Jonathan Cameron 2023-05-16 16:16 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 15/21] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-09 20:04 ` Robin Murphy 2023-05-10 19:56 ` Sascha Hauer 2023-05-16 15:39 ` Sascha Hauer 2023-05-16 15:39 ` Sascha Hauer 2023-05-16 15:27 ` Sascha Hauer 2023-05-16 15:27 ` Sascha Hauer 2023-05-17 10:53 ` Jonathan Cameron 2023-05-17 10:53 ` Jonathan Cameron 2023-05-17 14:26 ` Sascha Hauer 2023-05-17 14:26 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 16/21] PM / devfreq: rockchip-dfi: make register stride SoC specific Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-16 16:18 ` Jonathan Cameron 2023-05-16 16:18 ` Jonathan Cameron 2023-05-19 6:45 ` Sascha Hauer 2023-05-19 6:45 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 17/21] PM / devfreq: rockchip-dfi: account for multiple DDRMON_CTRL registers Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-17 10:23 ` Jonathan Cameron 2023-05-17 10:23 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 18/21] PM / devfreq: rockchip-dfi: add support for RK3588 Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-17 10:24 ` Jonathan Cameron [this message] 2023-05-17 10:24 ` Jonathan Cameron 2023-05-05 11:38 ` [PATCH v4 19/21] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 20/21] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 11:38 ` [PATCH v4 21/21] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer 2023-05-05 11:38 ` Sascha Hauer 2023-05-05 16:29 ` Krzysztof Kozlowski 2023-05-05 16:29 ` Krzysztof Kozlowski 2023-05-05 16:31 ` Krzysztof Kozlowski 2023-05-05 16:31 ` Krzysztof Kozlowski 2023-05-09 9:37 ` Sascha Hauer 2023-05-09 9:40 ` Krzysztof Kozlowski 2023-05-09 10:02 ` Sascha Hauer 2023-05-05 16:38 ` [PATCH v4 00/21] Add perf support to the rockchip-dfi driver Vincent Legoll 2023-05-05 16:38 ` Vincent Legoll
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