From: Conor Dooley <conor@kernel.org> To: Jisheng Zhang <jszhang@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org>, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Yangtao Li <frank.li@vivo.com>, Wei Fu <wefu@redhat.com>, Icenowy Zheng <uwu@icenowy.me> Subject: Re: [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC Date: Thu, 18 May 2023 21:57:55 +0100 [thread overview] Message-ID: <20230518-unharmed-stencil-2a18bbdd3651@spud> (raw) In-Reply-To: <20230518184541.2627-9-jszhang@kernel.org> [-- Attachment #1: Type: text/plain, Size: 902 bytes --] On Fri, May 19, 2023 at 02:45:40AM +0800, Jisheng Zhang wrote: > Currently, I would like to maintain the T-HEAD RISC-V SoC support. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > MAINTAINERS | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index e0ad886d3163..6df20c65798a 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -18162,6 +18162,12 @@ F: drivers/perf/riscv_pmu.c > F: drivers/perf/riscv_pmu_legacy.c > F: drivers/perf/riscv_pmu_sbi.c > > +RISC-V THEAD SoC SUPPORT > +M: Jisheng Zhang <jszhang@kernel.org> > +L: linux-riscv@lists.infradead.org > +S: Maintained > +F: arch/riscv/boot/dts/thead/ > + > RNBD BLOCK DRIVERS > M: Md. Haris Iqbal <haris.iqbal@ionos.com> > M: Jack Wang <jinpu.wang@ionos.com> > -- > 2.40.0 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org> To: Jisheng Zhang <jszhang@kernel.org> Cc: devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>, Albert Ou <aou@eecs.berkeley.edu>, Yangtao Li <frank.li@vivo.com>, Marc Zyngier <maz@kernel.org>, linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Guo Ren <guoren@kernel.org>, Thomas Gleixner <tglx@linutronix.de>, linux-riscv@lists.infradead.org, Wei Fu <wefu@redhat.com> Subject: Re: [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC Date: Thu, 18 May 2023 21:57:55 +0100 [thread overview] Message-ID: <20230518-unharmed-stencil-2a18bbdd3651@spud> (raw) In-Reply-To: <20230518184541.2627-9-jszhang@kernel.org> [-- Attachment #1.1: Type: text/plain, Size: 902 bytes --] On Fri, May 19, 2023 at 02:45:40AM +0800, Jisheng Zhang wrote: > Currently, I would like to maintain the T-HEAD RISC-V SoC support. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > MAINTAINERS | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index e0ad886d3163..6df20c65798a 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -18162,6 +18162,12 @@ F: drivers/perf/riscv_pmu.c > F: drivers/perf/riscv_pmu_legacy.c > F: drivers/perf/riscv_pmu_sbi.c > > +RISC-V THEAD SoC SUPPORT > +M: Jisheng Zhang <jszhang@kernel.org> > +L: linux-riscv@lists.infradead.org > +S: Maintained > +F: arch/riscv/boot/dts/thead/ > + > RNBD BLOCK DRIVERS > M: Md. Haris Iqbal <haris.iqbal@ionos.com> > M: Jack Wang <jinpu.wang@ionos.com> > -- > 2.40.0 > [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-05-18 20:58 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-18 18:45 [PATCH v2 0/9] Add Sipeed Lichee Pi 4A RISC-V board support Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 18:45 ` [PATCH v2 1/9] dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 19:36 ` Conor Dooley 2023-05-18 19:36 ` Conor Dooley 2023-05-21 13:14 ` Guo Ren 2023-05-21 13:14 ` Guo Ren 2023-05-18 18:45 ` [PATCH v2 2/9] dt-bindings: timer: Add T-HEAD TH1520 clint Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 19:37 ` Conor Dooley 2023-05-18 19:37 ` Conor Dooley 2023-05-18 18:45 ` [PATCH v2 3/9] dt-bindings: riscv: Add T-HEAD TH1520 board compatibles Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 19:40 ` Conor Dooley 2023-05-18 19:40 ` Conor Dooley 2023-05-19 15:50 ` Icenowy Zheng 2023-05-19 15:50 ` Icenowy Zheng 2023-05-18 18:45 ` [PATCH v2 4/9] dt-binding: riscv: add T-HEAD CPU reset Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 19:39 ` Rob Herring 2023-05-18 19:39 ` Rob Herring 2023-05-18 19:53 ` Conor Dooley 2023-05-18 19:53 ` Conor Dooley 2023-05-22 2:16 ` Guo Ren 2023-05-22 2:16 ` Guo Ren 2023-05-22 7:09 ` Conor Dooley 2023-05-22 7:09 ` Conor Dooley 2023-05-22 7:42 ` Guo Ren 2023-05-22 7:42 ` Guo Ren 2023-05-30 12:55 ` Krzysztof Kozlowski 2023-05-30 12:55 ` Krzysztof Kozlowski 2023-05-18 18:45 ` [PATCH v2 5/9] riscv: Add the T-HEAD SoC family Kconfig option Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 19:42 ` Conor Dooley 2023-05-18 19:42 ` Conor Dooley 2023-05-18 18:45 ` [PATCH v2 6/9] riscv: dts: add initial T-HEAD TH1520 SoC device tree Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 21:02 ` Conor Dooley 2023-05-18 21:02 ` Conor Dooley 2023-05-26 2:21 ` Yixun Lan 2023-05-26 2:21 ` Yixun Lan 2023-05-18 18:45 ` [PATCH v2 7/9] riscv: dts: thead: add sipeed Lichee Pi 4A board " Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 21:03 ` Conor Dooley 2023-05-18 21:03 ` Conor Dooley 2023-05-18 18:45 ` [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 20:57 ` Conor Dooley [this message] 2023-05-18 20:57 ` Conor Dooley 2023-05-18 18:45 ` [PATCH v2 9/9] riscv: defconfig: enable T-HEAD SoC Jisheng Zhang 2023-05-18 18:45 ` Jisheng Zhang 2023-05-18 20:58 ` Conor Dooley 2023-05-18 20:58 ` Conor Dooley 2023-05-19 20:56 ` Palmer Dabbelt 2023-05-19 20:56 ` Palmer Dabbelt 2023-05-20 1:16 ` Guo Ren 2023-05-20 1:16 ` Guo Ren 2023-05-26 2:19 ` [PATCH v2 0/9] Add Sipeed Lichee Pi 4A RISC-V board support Yixun Lan 2023-05-26 2:19 ` Yixun Lan
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