From: Sricharan Ramabadhran <quic_srichara@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <ulf.hansson@linaro.org>, <linus.walleij@linaro.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <p.zabel@pengutronix.de>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <robimarko@gmail.com>, <andy.shevchenko@gmail.com>, <quic_srichara@quicinc.com> Subject: [PATCH V7 3/8] dt-bindings: pinctrl: qcom: Add support for ipq5018 Date: Fri, 19 May 2023 18:24:04 +0530 [thread overview] Message-ID: <20230519125409.497439-4-quic_srichara@quicinc.com> (raw) In-Reply-To: <20230519125409.497439-1-quic_srichara@quicinc.com> Add device tree binding Documentation details for ipq5018 pinctrl driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> --- [v7] No change .../bindings/pinctrl/qcom,ipq5018-tlmm.yaml | 127 ++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml new file mode 100644 index 000000000000..fad0118fd521 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5018 TLMM pin controller + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + +description: + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC. + +properties: + compatible: + const: qcom,ipq5018-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + "#interrupt-cells": true + gpio-controller: true + "#gpio-cells": true + gpio-ranges: true + wakeup-parent: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 24 + + gpio-line-names: + maxItems: 47 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5018-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5018-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5018-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$" + minItems: 1 + maxItems: 8 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ atest_char, audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd, + audio_rxfsync, audio_rxmclk, audio_txbclk, audio_txd, + audio_txfsync, audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart0, + blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1, + blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1, + blsp2_spi, blsp2_spi0, blsp2_spi1, btss, burn0, burn1, cri_trng, + cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio, + gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio, + pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, pll_test, + prng_rosc, pwm0, pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, + qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a, + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, + qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs, + qspi_data, reset_out, sdc1_clk, sdc1_cmd, sdc1_data, wci_txd, + wci_rxd, wsa_swrm, wsi_clk3, wsi_data3, wsis_reset, xfem ] + + required: + - pins + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq5018-tlmm"; + reg = <0x01000000 0x300000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 47>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + + uart-w-state { + rx-pins { + pins = "gpio33"; + function = "blsp1_uart1"; + bias-pull-down; + }; + + tx-pins { + pins = "gpio34"; + function = "blsp1_uart1"; + bias-pull-down; + }; + }; + }; +... -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Sricharan Ramabadhran <quic_srichara@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <ulf.hansson@linaro.org>, <linus.walleij@linaro.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <p.zabel@pengutronix.de>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <robimarko@gmail.com>, <andy.shevchenko@gmail.com>, <quic_srichara@quicinc.com> Subject: [PATCH V7 3/8] dt-bindings: pinctrl: qcom: Add support for ipq5018 Date: Fri, 19 May 2023 18:24:04 +0530 [thread overview] Message-ID: <20230519125409.497439-4-quic_srichara@quicinc.com> (raw) In-Reply-To: <20230519125409.497439-1-quic_srichara@quicinc.com> Add device tree binding Documentation details for ipq5018 pinctrl driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> --- [v7] No change .../bindings/pinctrl/qcom,ipq5018-tlmm.yaml | 127 ++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml new file mode 100644 index 000000000000..fad0118fd521 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5018 TLMM pin controller + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + +description: + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC. + +properties: + compatible: + const: qcom,ipq5018-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + "#interrupt-cells": true + gpio-controller: true + "#gpio-cells": true + gpio-ranges: true + wakeup-parent: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 24 + + gpio-line-names: + maxItems: 47 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5018-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5018-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5018-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$" + minItems: 1 + maxItems: 8 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ atest_char, audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd, + audio_rxfsync, audio_rxmclk, audio_txbclk, audio_txd, + audio_txfsync, audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart0, + blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1, + blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1, + blsp2_spi, blsp2_spi0, blsp2_spi1, btss, burn0, burn1, cri_trng, + cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio, + gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio, + pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, pll_test, + prng_rosc, pwm0, pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, + qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a, + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, + qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs, + qspi_data, reset_out, sdc1_clk, sdc1_cmd, sdc1_data, wci_txd, + wci_rxd, wsa_swrm, wsi_clk3, wsi_data3, wsis_reset, xfem ] + + required: + - pins + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq5018-tlmm"; + reg = <0x01000000 0x300000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 47>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + + uart-w-state { + rx-pins { + pins = "gpio33"; + function = "blsp1_uart1"; + bias-pull-down; + }; + + tx-pins { + pins = "gpio34"; + function = "blsp1_uart1"; + bias-pull-down; + }; + }; + }; +... -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-05-19 12:55 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-19 12:54 [PATCH V7 0/8] Add minimal boot support for IPQ5018 Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 1/8] dt-bindings: arm64: Add IPQ5018 clock and reset Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 2/8] clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018 Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran [this message] 2023-05-19 12:54 ` [PATCH V7 3/8] dt-bindings: pinctrl: qcom: Add support for ipq5018 Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 4/8] pinctrl: qcom: Add IPQ5018 pinctrl driver Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 18:47 ` Andy Shevchenko 2023-05-19 18:47 ` Andy Shevchenko 2023-05-29 10:28 ` Sricharan Ramabadhran 2023-05-29 10:28 ` Sricharan Ramabadhran 2023-05-29 15:55 ` andy.shevchenko 2023-05-29 15:55 ` andy.shevchenko 2023-06-01 9:50 ` Sricharan Ramabadhran 2023-06-01 9:50 ` Sricharan Ramabadhran 2023-06-01 9:51 ` Krzysztof Kozlowski 2023-06-01 9:51 ` Krzysztof Kozlowski 2023-06-01 11:41 ` Sricharan Ramabadhran 2023-06-01 11:41 ` Sricharan Ramabadhran 2023-06-01 11:53 ` Krzysztof Kozlowski 2023-06-01 11:53 ` Krzysztof Kozlowski 2023-06-01 13:27 ` Krzysztof Kozlowski 2023-06-01 13:27 ` Krzysztof Kozlowski 2023-06-02 3:21 ` Sricharan Ramabadhran 2023-06-02 3:21 ` Sricharan Ramabadhran 2023-05-22 7:32 ` Linus Walleij 2023-05-22 7:32 ` Linus Walleij 2023-05-29 10:28 ` Sricharan Ramabadhran 2023-05-29 10:28 ` Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 5/8] dt-bindings: qcom: Add ipq5018 bindings Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 6/8] dt-bindings: scm: Add compatible for IPQ5018 Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 7/8] arm64: dts: Add ipq5018 SoC and rdp432-c2 board support Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran 2023-05-19 12:54 ` [PATCH V7 8/8] arm64: defconfig: Enable IPQ5018 SoC base configs Sricharan Ramabadhran 2023-05-19 12:54 ` Sricharan Ramabadhran
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