From: William Qiu <william.qiu@starfivetech.com> To: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org> Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>, Linus Walleij <linus.walleij@linaro.org>, William Qiu <william.qiu@starfivetech.com> Subject: [PATCH v4 0/3] Add initialization of clock for StarFive JH7110 SoC Date: Tue, 4 Jul 2023 17:19:45 +0800 [thread overview] Message-ID: <20230704091948.85247-4-william.qiu@starfivetech.com> (raw) In-Reply-To: <20230704091948.85247-1-william.qiu@starfivetech.com> Hi, This patchset adds initial rudimentary support for the StarFive Quad SPI controller driver. And this driver will be used in StarFive's VisionFive 2 board. In 6.4, the QSPI_AHB and QSPI_APB clocks changed from the default ON state to the default OFF state, so these clocks need to be enabled in the driver.At the same time, dts patch is added to this series. Changes v3->v4: - Added minItems for clocks. - Added clock names property. - Fixed formatting issues. Changes v2->v3: - Rebaed to v6.4rc6. - Renamed the clock names. - Changed the variable definition type. Changes v1->v2: - Renamed the clock names. - Specified a different array of clocks. - Used clk_bulk_ APIs. The patch series is based on v6.4rc6. William Qiu (3): dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC .../bindings/spi/cdns,qspi-nor.yaml | 12 ++++++- .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++ drivers/spi/spi-cadence-quadspi.c | 20 ++++++++++++ 4 files changed, 81 insertions(+), 1 deletion(-) -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: William Qiu <william.qiu@starfivetech.com> To: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org> Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>, Linus Walleij <linus.walleij@linaro.org>, William Qiu <william.qiu@starfivetech.com> Subject: [PATCH v4 0/3] Add initialization of clock for StarFive JH7110 SoC Date: Tue, 4 Jul 2023 17:19:45 +0800 [thread overview] Message-ID: <20230704091948.85247-4-william.qiu@starfivetech.com> (raw) In-Reply-To: <20230704091948.85247-1-william.qiu@starfivetech.com> Hi, This patchset adds initial rudimentary support for the StarFive Quad SPI controller driver. And this driver will be used in StarFive's VisionFive 2 board. In 6.4, the QSPI_AHB and QSPI_APB clocks changed from the default ON state to the default OFF state, so these clocks need to be enabled in the driver.At the same time, dts patch is added to this series. Changes v3->v4: - Added minItems for clocks. - Added clock names property. - Fixed formatting issues. Changes v2->v3: - Rebaed to v6.4rc6. - Renamed the clock names. - Changed the variable definition type. Changes v1->v2: - Renamed the clock names. - Specified a different array of clocks. - Used clk_bulk_ APIs. The patch series is based on v6.4rc6. William Qiu (3): dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC .../bindings/spi/cdns,qspi-nor.yaml | 12 ++++++- .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++ drivers/spi/spi-cadence-quadspi.c | 20 ++++++++++++ 4 files changed, 81 insertions(+), 1 deletion(-) -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-07-04 9:20 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-07-04 9:19 [PATCH v1 0/2] Add SPI module for StarFive JH7110 SoC William Qiu 2023-07-04 9:19 ` William Qiu 2023-07-04 9:19 ` [PATCH v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names William Qiu 2023-07-04 9:19 ` William Qiu 2023-07-04 9:19 ` [PATCH v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC William Qiu 2023-07-04 9:19 ` William Qiu 2023-07-04 9:19 ` William Qiu [this message] 2023-07-04 9:19 ` [PATCH v4 0/3] Add initialization of clock for StarFive " William Qiu 2023-07-04 9:19 ` [PATCH v4 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks " William Qiu 2023-07-04 9:19 ` William Qiu 2023-07-04 9:19 ` [PATCH v4 2/3] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI William Qiu 2023-07-04 9:19 ` William Qiu 2023-07-04 9:19 ` [PATCH v4 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC William Qiu 2023-07-04 9:19 ` William Qiu -- strict thread matches above, loose matches on Subject: below -- 2023-07-04 9:04 [PATCH v4 0/3] Add initialization of clock " William Qiu 2023-07-04 9:04 ` William Qiu
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