From: Conor Dooley <conor@kernel.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Minda Chen <minda.chen@starfivetech.com>,
devicetree@vger.kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
William Qiu <william.qiu@starfivetech.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Mark Brown <broonie@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: (subset) [PATCH v3 0/2] Add SPI module for StarFive JH7110 SoC
Date: Wed, 26 Jul 2023 17:15:20 +0100 [thread overview]
Message-ID: <20230726-sixth-uphill-66fbc1b5e5ce@spud> (raw)
In-Reply-To: <20230724101054.25268-1-william.qiu@starfivetech.com>
From: Conor Dooley <conor.dooley@microchip.com>
On Mon, 24 Jul 2023 18:10:52 +0800, William Qiu wrote:
> This patchset adds initial rudimentary support for the StarFive
> SPI controller. And this driver will be used in StarFive's
> VisionFive 2 board. The first patch constrain minItems of clocks
> for JH7110 SPI and Patch 2 adds support for StarFive JH7110 SPI.
>
> Changes v2->v3:
> - Rebaed to v6.5rc3.
> - Registered one more clock.
> - Dropped commit that changed the number of clocks in YAML.
> - Rewrited the commit comment.
>
> [...]
Applied to riscv-dt-for-next, thanks!
[2/2] riscv: dts: starfive: Add spi node and pins configuration
https://git.kernel.org/conor/c/74fb20c8f05d
Thanks,
Conor.
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Minda Chen <minda.chen@starfivetech.com>,
devicetree@vger.kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
William Qiu <william.qiu@starfivetech.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Mark Brown <broonie@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: (subset) [PATCH v3 0/2] Add SPI module for StarFive JH7110 SoC
Date: Wed, 26 Jul 2023 17:15:20 +0100 [thread overview]
Message-ID: <20230726-sixth-uphill-66fbc1b5e5ce@spud> (raw)
In-Reply-To: <20230724101054.25268-1-william.qiu@starfivetech.com>
From: Conor Dooley <conor.dooley@microchip.com>
On Mon, 24 Jul 2023 18:10:52 +0800, William Qiu wrote:
> This patchset adds initial rudimentary support for the StarFive
> SPI controller. And this driver will be used in StarFive's
> VisionFive 2 board. The first patch constrain minItems of clocks
> for JH7110 SPI and Patch 2 adds support for StarFive JH7110 SPI.
>
> Changes v2->v3:
> - Rebaed to v6.5rc3.
> - Registered one more clock.
> - Dropped commit that changed the number of clocks in YAML.
> - Rewrited the commit comment.
>
> [...]
Applied to riscv-dt-for-next, thanks!
[2/2] riscv: dts: starfive: Add spi node and pins configuration
https://git.kernel.org/conor/c/74fb20c8f05d
Thanks,
Conor.
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-07-26 16:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-24 10:10 [PATCH v3 0/2] Add SPI module for StarFive JH7110 SoC William Qiu
2023-07-24 10:10 ` William Qiu
2023-07-24 10:10 ` [PATCH v3 1/2] dt-bindings: spi: add reference file to YAML William Qiu
2023-07-24 10:10 ` William Qiu
2023-07-24 10:10 ` [PATCH v3 2/2] riscv: dts: starfive: Add spi node and pins configuration William Qiu
2023-07-24 10:10 ` William Qiu
2023-07-24 18:28 ` (subset) [PATCH v3 0/2] Add SPI module for StarFive JH7110 SoC Mark Brown
2023-07-24 18:28 ` Mark Brown
2023-07-26 16:15 ` Conor Dooley [this message]
2023-07-26 16:15 ` Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230726-sixth-uphill-66fbc1b5e5ce@spud \
--to=conor@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=kernel@esmil.dk \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=minda.chen@starfivetech.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=william.qiu@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.