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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 06/25] drm/i915: Add helper to modeset a set of pipes
Date: Mon, 18 Sep 2023 21:25:03 +0300	[thread overview]
Message-ID: <20230918182506.1634464-1-imre.deak@intel.com> (raw)
In-Reply-To: <20230914192659.757475-7-imre.deak@intel.com>

Add intel_modeset_pipes_in_mask_early() to modeset a provided set of
pipes, used in a follow-up patch.

As opposed intel_modeset_all_pipes() which modesets only the active
pipes - others don't requiring programming the HW - modeset all enabled
pipes in intel_modeset_pipes_in_mask_early() which may need to recompute
their state even if they are not active (that is in the DPMS off state).

While at it add DocBook descriptions for the two exported functions.

v2:
- Add a flag controlling if active planes are force updated as well.
- Add DockBook descriptions.
v3:
- For clarity use _early/_late suffixes for the exported functions
  instead of the update_active_planes parameter. (Ville)
v4:
- In intel_modeset_pipes_in_mask_early() update only the crtc
  flags relevant to the early phase. (Ville)
- Rename intel_modeset_all_pipes() in a separate patch.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 102 +++++++++++++++----
 drivers/gpu/drm/i915/display/intel_display.h |   2 +
 2 files changed, 83 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6bbc9069754c4..1c9a128f4af27 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5407,16 +5407,90 @@ intel_verify_planes(struct intel_atomic_state *state)
 			     plane_state->uapi.visible);
 }
 
+static int intel_modeset_pipe(struct intel_atomic_state *state,
+			      struct intel_crtc_state *crtc_state,
+			      const char *reason)
+{
+	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	int ret;
+
+	drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Full modeset due to %s\n",
+		    crtc->base.base.id, crtc->base.name, reason);
+
+	ret = drm_atomic_add_affected_connectors(&state->base,
+						 &crtc->base);
+	if (ret)
+		return ret;
+
+	ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc);
+	if (ret)
+		return ret;
+
+	ret = intel_atomic_add_affected_planes(state, crtc);
+	if (ret)
+		return ret;
+
+	crtc_state->uapi.mode_changed = true;
+
+	return 0;
+}
+
+/**
+ * intel_modeset_pipes_in_mask_early - force a full modeset on a set of pipes
+ * @state: intel atomic state
+ * @reason: the reason for the full modeset
+ * @mask: mask of pipes to modeset
+ *
+ * Add pipes in @mask to @state and force a full modeset on the enabled ones
+ * due to the description in @reason.
+ * This function can be called only before new plane states are computed.
+ *
+ * Returns 0 in case of success, negative error code otherwise.
+ */
+int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state,
+				      const char *reason, u8 mask)
+{
+	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_crtc *crtc;
+
+	for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, mask) {
+		struct intel_crtc_state *crtc_state;
+		int ret;
+
+		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
+		if (IS_ERR(crtc_state))
+			return PTR_ERR(crtc_state);
+
+		if (!crtc_state->hw.enable ||
+		    intel_crtc_needs_modeset(crtc_state))
+			continue;
+
+		ret = intel_modeset_pipe(state, crtc_state, reason);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * intel_modeset_all_pipes - force a full modeset on all pipes
+ * @state: intel atomic state
+ * @reason: the reason for the full modeset
+ *
+ * Add all pipes to @state and force a full modeset on the active ones due to
+ * the description in @reason.
+ * This function can be called only after new plane states are computed already.
+ *
+ * Returns 0 in case of success, negative error code otherwise.
+ */
 int intel_modeset_all_pipes(struct intel_atomic_state *state,
 			    const char *reason)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 	struct intel_crtc *crtc;
 
-	/*
-	 * Add all pipes to the state, and force
-	 * a modeset on all the active ones.
-	 */
 	for_each_intel_crtc(&dev_priv->drm, crtc) {
 		struct intel_crtc_state *crtc_state;
 		int ret;
@@ -5429,25 +5503,11 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
 		    intel_crtc_needs_modeset(crtc_state))
 			continue;
 
-		drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] Full modeset due to %s\n",
-			    crtc->base.base.id, crtc->base.name, reason);
+		ret = intel_modeset_pipe(state, crtc_state, reason);
+		if (ret)
+			return ret;
 
-		crtc_state->uapi.mode_changed = true;
 		crtc_state->update_pipe = false;
-
-		ret = drm_atomic_add_affected_connectors(&state->base,
-							 &crtc->base);
-		if (ret)
-			return ret;
-
-		ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc);
-		if (ret)
-			return ret;
-
-		ret = intel_atomic_add_affected_planes(state, crtc);
-		if (ret)
-			return ret;
-
 		crtc_state->update_planes |= crtc_state->active_planes;
 		crtc_state->async_flip_planes = 0;
 		crtc_state->do_async_flip = false;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 49ac8473b988b..3008e8b2b437e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -513,6 +513,8 @@ void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state);
 void intel_update_watermarks(struct drm_i915_private *i915);
 
 /* modesetting */
+int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state,
+				      const char *reason, u8 pipe_mask);
 int intel_modeset_all_pipes(struct intel_atomic_state *state,
 			    const char *reason);
 void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
-- 
2.37.2


  parent reply	other threads:[~2023-09-18 18:24 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-14 19:26 [Intel-gfx] [PATCH v3 00/25] drm/i915: Improve BW management on shared display links Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 01/25] drm/i915/dp: Factor out helpers to compute the link limits Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 02/25] drm/i915/dp: Track the pipe and link bpp limits separately Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 03/25] drm/i915/dp: Skip computing a non-DSC link config if DSC is needed Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 04/25] drm/i915/dp: Update the link bpp limits for DSC mode Imre Deak
2023-09-19 14:48   ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 05/25] drm/i915/dp: Limit the output link bpp in " Imre Deak
2023-09-19 14:49   ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 06/25] drm/i915: Add helper to modeset a set of pipes Imre Deak
2023-09-15 18:34   ` Ville Syrjälä
2023-09-15 20:03     ` Imre Deak
2023-09-18 18:25   ` Imre Deak [this message]
2023-09-19 14:25     ` [Intel-gfx] [PATCH v5 " Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 07/25] drm/i915: During modeset forcing handle inactive but enabled pipes Imre Deak
2023-09-18 18:25   ` [Intel-gfx] [PATCH v5 07/25] drm/i915: Rename intel_modeset_all_pipes() to intel_modeset_all_pipes_late() Imre Deak
2023-09-19 14:26     ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 08/25] drm/i915: Factor out a helper to check/compute all the CRTC states Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 09/25] drm/i915: Add helpers for BW management on shared display links Imre Deak
2023-09-15  0:33   ` [Intel-gfx] [PATCH v4 " Imre Deak
2023-09-15 19:11     ` Ville Syrjälä
2023-09-15 21:01       ` Imre Deak
2023-09-18 18:25     ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-19 15:21       ` Ville Syrjälä
2023-09-19 17:40         ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 10/25] drm/i915/fdi: Improve FDI BW sharing between pipe B and C Imre Deak
2023-09-15 19:31   ` Ville Syrjälä
2023-09-15 23:13     ` Imre Deak
2023-09-19 15:35       ` Ville Syrjälä
2023-09-19 17:45         ` Imre Deak
2023-09-18 18:25   ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 11/25] drm/i915/fdi: Recompute state for affected CRTCs on FDI links Imre Deak
2023-09-19 15:44   ` Ville Syrjälä
2023-09-19 18:14     ` Imre Deak
2023-09-19 18:28       ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 12/25] drm/dp_mst: Fix fractional DSC bpp handling Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 13/25] drm/dp_mst: Add a way to calculate PBN values with FEC overhead Imre Deak
2023-09-14 19:26   ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 14/25] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-09-14 19:26   ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 15/25] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-09-14 19:26   ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 16/25] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-09-14 19:26   ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 17/25] drm/i915/dp_mst: Fix PBN calculation with FEC overhead Imre Deak
2023-09-20  9:09   ` Lisovskiy, Stanislav
2023-09-20 10:58   ` Ville Syrjälä
2023-09-20 11:35     ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 18/25] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-09-20  9:11   ` Lisovskiy, Stanislav
2023-09-20 10:59     ` Ville Syrjälä
2023-09-20 11:25       ` Lisovskiy, Stanislav
2023-09-20 12:38         ` Imre Deak
2023-09-20 13:56           ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 19/25] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-09-25  8:00   ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 20/25] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-09-25  7:56   ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 21/25] drm/i915/dp_mst: Enable DSC decompression if any stream needs this Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 22/25] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 23/25] drm/i915/dp_mst: Allow DSC only for sink ports of the first branch device Imre Deak
2023-09-25  7:44   ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 24/25] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-09-19 10:52   ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-25  7:42     ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 25/25] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-09-25  7:54   ` Lisovskiy, Stanislav
2023-09-14 23:33 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve BW management on shared display links (rev4) Patchwork
2023-09-15  4:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links (rev5) Patchwork
2023-09-15  4:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-15  4:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-15 12:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-19  1:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve BW management on shared display links (rev9) Patchwork
2023-09-19 11:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links (rev10) Patchwork
2023-09-19 11:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-19 11:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-19 13:29   ` Imre Deak

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