From: Claudiu <claudiu.beznea@tuxon.dev>
To: geert+renesas@glider.be, magnus.damm@gmail.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org
Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: [PATCH 5/6] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1
Date: Tue, 10 Oct 2023 16:27:00 +0300 [thread overview]
Message-ID: <20231010132701.1658737-6-claudiu.beznea.uj@bp.renesas.com> (raw)
In-Reply-To: <20231010132701.1658737-1-claudiu.beznea.uj@bp.renesas.com>
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Add SDHI1 to RZ/G3S Smarc Carrier-II board. This is connected to a uSD
interface. Although Vccq doesn't cross the boundary of SoM it has
been added to RZ/G3S Smarc Carrier-II dtsi to have all the bits related to
SDHI1 in a single place. At the moment SoM is used only with RZ/G3S Smarc
Carrier-II board.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 66 ++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
index e7073a09ed2e..71c0cbee6258 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
@@ -11,6 +11,27 @@
/ {
aliases {
serial0 = &scif0;
+ mmc1 = &sdhi1;
+ };
+
+ /* Reserved regulators 0-9 for SoM. */
+ vcc_sdhi1: regulator10 {
+ compatible = "regulator-fixed";
+ regulator-name = "SDHI1 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpios = <&pinctrl RZG2L_GPIO(2, 3) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi1: regulator11 {
+ compatible = "regulator-gpio";
+ regulator-name = "SDHI1 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ gpios = <&pinctrl RZG2L_GPIO(4, 2) GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1>, <1800000 0>;
};
};
@@ -19,6 +40,38 @@ scif0_pins: scif0 {
pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */
<RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */
};
+
+ sdhi1_pins: sd1 {
+ data {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+ power-source = <3300>;
+ };
+
+ ctrl {
+ pins = "SD1_CLK", "SD1_CMD";
+ power-source = <3300>;
+ };
+
+ cd {
+ pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
+ };
+ };
+
+ sdhi1_pins_uhs: sd1-uhs {
+ data {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+ power-source = <1800>;
+ };
+
+ ctrl {
+ pins = "SD1_CLK", "SD1_CMD";
+ power-source = <1800>;
+ };
+
+ cd {
+ pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
+ };
+ };
};
&scif0 {
@@ -26,3 +79,16 @@ &scif0 {
pinctrl-0 = <&scif0_pins>;
status = "okay";
};
+
+&sdhi1 {
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-1 = <&sdhi1_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+ vmmc-supply = <&vcc_sdhi1>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ max-frequency = <125000000>;
+ status = "okay";
+};
--
2.39.2
next prev parent reply other threads:[~2023-10-10 13:27 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-10 13:26 [PATCH 0/6] arm64: dts: renesas: Add SDHI1 and SDHI2 for RZ/G3S Claudiu
2023-10-10 13:26 ` [PATCH 1/6] clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R() Claudiu
2023-10-10 14:52 ` Sergei Shtylyov
2023-10-11 7:36 ` claudiu beznea
2023-10-11 7:43 ` Geert Uytterhoeven
2023-10-11 15:55 ` claudiu beznea
2023-10-12 12:37 ` Geert Uytterhoeven
2023-10-10 13:26 ` [PATCH 2/6] clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2 Claudiu
2023-10-12 13:22 ` Geert Uytterhoeven
2023-10-10 13:26 ` [PATCH 3/6] arm64: dts: renesas: r9a08g045: Add nodes " Claudiu
2023-10-12 13:35 ` Geert Uytterhoeven
2023-10-10 13:26 ` [PATCH 4/6] arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2 Claudiu
2023-10-12 14:36 ` Geert Uytterhoeven
2023-10-13 5:45 ` claudiu beznea
2023-10-10 13:27 ` Claudiu [this message]
2023-10-12 14:44 ` [PATCH 5/6] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1 Geert Uytterhoeven
2023-10-13 5:51 ` claudiu beznea
2023-10-10 13:27 ` [PATCH 6/6] arm64: dts: renesas: rzg3s: Fix dtbs_check Claudiu
2023-10-12 14:49 ` Geert Uytterhoeven
2023-10-13 5:55 ` claudiu beznea
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