From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To: soc@kernel.org, Arnd Bergmann <arnd@arndb.de>
Cc: Pierre Gondois <pierre.gondois@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Masami Hiramatsu <mhiramat@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: [PATCH 2/2] arm64: dts: socionext: add missing cache properties
Date: Mon, 23 Oct 2023 11:12:21 +0900 [thread overview]
Message-ID: <20231023021221.2884828-3-hayashi.kunihiko@socionext.com> (raw)
In-Reply-To: <20231023021221.2884828-1-hayashi.kunihiko@socionext.com>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
As all level 2 and level 3 caches are unified, add required
cache-unified property to fix warnings like:
uniphier-ld11-ref.dtb: l2-cache: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 1 +
3 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 54e58d945fd7..4680571c264d 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -53,6 +53,7 @@ cpu1: cpu@1 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 18390cba2eda..335093da6573 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -87,11 +87,13 @@ cpu3: cpu@101 {
a72_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
a53_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 56e037900818..d6e3cc6fdb25 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -84,6 +84,7 @@ cpu3: cpu@3 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To: soc@kernel.org, Arnd Bergmann <arnd@arndb.de>
Cc: Pierre Gondois <pierre.gondois@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Masami Hiramatsu <mhiramat@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: [PATCH 2/2] arm64: dts: socionext: add missing cache properties
Date: Mon, 23 Oct 2023 11:12:21 +0900 [thread overview]
Message-ID: <20231023021221.2884828-3-hayashi.kunihiko@socionext.com> (raw)
In-Reply-To: <20231023021221.2884828-1-hayashi.kunihiko@socionext.com>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
As all level 2 and level 3 caches are unified, add required
cache-unified property to fix warnings like:
uniphier-ld11-ref.dtb: l2-cache: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 1 +
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 1 +
3 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 54e58d945fd7..4680571c264d 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -53,6 +53,7 @@ cpu1: cpu@1 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 18390cba2eda..335093da6573 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -87,11 +87,13 @@ cpu3: cpu@101 {
a72_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
a53_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 56e037900818..d6e3cc6fdb25 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -84,6 +84,7 @@ cpu3: cpu@3 {
l2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-23 2:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 2:12 [PATCH 0/2] Update UniPhier armv8 devicetree Kunihiko Hayashi
2023-10-23 2:12 ` Kunihiko Hayashi
2023-10-23 2:12 ` [PATCH 1/2] arm64: dts: Update cache properties for socionext Kunihiko Hayashi
2023-10-23 2:12 ` Kunihiko Hayashi
2023-10-23 2:12 ` Kunihiko Hayashi [this message]
2023-10-23 2:12 ` [PATCH 2/2] arm64: dts: socionext: add missing cache properties Kunihiko Hayashi
2023-10-23 19:30 ` [PATCH 0/2] Update UniPhier armv8 devicetree patchwork-bot+linux-soc
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231023021221.2884828-3-hayashi.kunihiko@socionext.com \
--to=hayashi.kunihiko@socionext.com \
--cc=arnd@arndb.de \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mhiramat@kernel.org \
--cc=pierre.gondois@arm.com \
--cc=robh@kernel.org \
--cc=soc@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.