From: Conor Dooley <conor@kernel.org>
To: Ben Wolsieffer <ben.wolsieffer@hefring.com>
Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Alain Volmat <alain.volmat@foss.st.com>,
Erwan Leray <erwan.leray@foss.st.com>,
Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Subject: Re: [PATCH v2 3/5] dt-bindings: spi: add stm32f7-spi compatible
Date: Fri, 3 Nov 2023 14:51:59 +0000 [thread overview]
Message-ID: <20231103-appendix-emission-952777ef7c4f@spud> (raw)
In-Reply-To: <ZUT1qFieeCby9ALg@dell-precision-5540>
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On Fri, Nov 03, 2023 at 09:29:12AM -0400, Ben Wolsieffer wrote:
> Hi Conor,
>
> On Fri, Nov 03, 2023 at 12:50:53PM +0000, Conor Dooley wrote:
> > On Thu, Nov 02, 2023 at 03:37:20PM -0400, Ben Wolsieffer wrote:
> > A wider range of supported word sizes and some additional buffers,
> > implies that the F4 could be used as a fallback compatible. Does the
> > register map change incompatibly in the process of widening the FIFOs or
> > something like that?
>
> Yes, the F4 has a single bit to select 8 or 16 bit word size, while the
> F7 uses four bits to select an arbitrary word size from 4 to 16 bits.
> This series supports the packing mode, to allow sending two <=8 bit
> words with a single write to the FIFO, but even if we didn't want to
> support this feature, the F7 would require setting the FRXTH bit (not
> present in the F4) when using <=8 bit word sizes.
Oke.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Ben Wolsieffer <ben.wolsieffer@hefring.com>
Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Alain Volmat <alain.volmat@foss.st.com>,
Erwan Leray <erwan.leray@foss.st.com>,
Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Subject: Re: [PATCH v2 3/5] dt-bindings: spi: add stm32f7-spi compatible
Date: Fri, 3 Nov 2023 14:51:59 +0000 [thread overview]
Message-ID: <20231103-appendix-emission-952777ef7c4f@spud> (raw)
In-Reply-To: <ZUT1qFieeCby9ALg@dell-precision-5540>
[-- Attachment #1.1: Type: text/plain, Size: 967 bytes --]
On Fri, Nov 03, 2023 at 09:29:12AM -0400, Ben Wolsieffer wrote:
> Hi Conor,
>
> On Fri, Nov 03, 2023 at 12:50:53PM +0000, Conor Dooley wrote:
> > On Thu, Nov 02, 2023 at 03:37:20PM -0400, Ben Wolsieffer wrote:
> > A wider range of supported word sizes and some additional buffers,
> > implies that the F4 could be used as a fallback compatible. Does the
> > register map change incompatibly in the process of widening the FIFOs or
> > something like that?
>
> Yes, the F4 has a single bit to select 8 or 16 bit word size, while the
> F7 uses four bits to select an arbitrary word size from 4 to 16 bits.
> This series supports the packing mode, to allow sending two <=8 bit
> words with a single write to the FIFO, but even if we didn't want to
> support this feature, the F7 would require setting the FRXTH bit (not
> present in the F4) when using <=8 bit word sizes.
Oke.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
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next prev parent reply other threads:[~2023-11-03 14:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-02 19:37 [PATCH v2 0/5] Add STM32F7 SPI support Ben Wolsieffer
2023-11-02 19:37 ` Ben Wolsieffer
2023-11-02 19:37 ` [PATCH v2 1/5] spi: stm32: rename stm32f4_* to stm32fx_* Ben Wolsieffer
2023-11-02 19:37 ` Ben Wolsieffer
2023-11-02 19:37 ` [PATCH v2 2/5] spi: stm32: use callbacks for read_rx and write_tx Ben Wolsieffer
2023-11-02 19:37 ` Ben Wolsieffer
2023-11-02 19:37 ` [PATCH v2 3/5] dt-bindings: spi: add stm32f7-spi compatible Ben Wolsieffer
2023-11-02 19:37 ` Ben Wolsieffer
2023-11-03 12:50 ` Conor Dooley
2023-11-03 12:50 ` Conor Dooley
2023-11-03 13:29 ` Ben Wolsieffer
2023-11-03 13:29 ` Ben Wolsieffer
2023-11-03 14:51 ` Conor Dooley [this message]
2023-11-03 14:51 ` Conor Dooley
2023-11-02 19:37 ` [PATCH v2 4/5] spi: stm32: add STM32F7 support Ben Wolsieffer
2023-11-02 19:37 ` Ben Wolsieffer
2023-11-02 19:37 ` [PATCH v2 5/5] ARM: dts: stm32: add SPI support on STM32F746 Ben Wolsieffer
2023-11-02 19:37 ` Ben Wolsieffer
2023-11-21 14:52 ` Alexandre TORGUE
2023-11-21 14:52 ` Alexandre TORGUE
2023-11-13 19:40 ` (subset) [PATCH v2 0/5] Add STM32F7 SPI support Mark Brown
2023-11-13 19:40 ` Mark Brown
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