[PATCH pciutils 1/2] lspci: Add TEE-IO extended capability bit

From: Alexey Kardashevskiy <aik@amd.com>
To: Alexey Kardashevskiy <aik@amd.com>
Cc: linux-pci@vger.kernel.org, "Martin Mareš" <mj@ucw.cz>,
	"Jonathan Cameron" <Jonathan.Cameron@huawei.com>
Subject: [PATCH pciutils 1/2] lspci: Add TEE-IO extended capability bit
Date: Sat, 30 Dec 2023 23:42:38 +1100	[thread overview]
Message-ID: <20231230124239.310927-2-aik@amd.com> (raw)
In-Reply-To: <20231230124239.310927-1-aik@amd.com>

PCIe r6.1 defines "TEE-IO Supported" in the PCI Express Device Capabilities
Register which indicates that the Function implements the TEE-IO functionality
as described by the TEE Device Interface Security Protocol (TDISP).

Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
---
 lib/header.h | 1 +
 ls-caps.c    | 1 +
 2 files changed, 2 insertions(+)

diff --git a/lib/header.h b/lib/header.h
index 58fe7df..47ee8a6 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -776,6 +776,7 @@
 #define  PCI_EXP_DEVCAP_PWR_VAL	0x3fc0000 /* Slot Power Limit Value */
 #define  PCI_EXP_DEVCAP_PWR_SCL	0xc000000 /* Slot Power Limit Scale */
 #define  PCI_EXP_DEVCAP_FLRESET	0x10000000 /* Function-Level Reset */
+#define  PCI_EXP_DEVCAP_TEE_IO  0x40000000 /* TEE-IO Supported (TDISP) */
 #define PCI_EXP_DEVCTL		0x8	/* Device Control */
 #define  PCI_EXP_DEVCTL_CERE	0x0001	/* Correctable Error Reporting En. */
 #define  PCI_EXP_DEVCTL_NFERE	0x0002	/* Non-Fatal Error Reporting Enable */
diff --git a/ls-caps.c b/ls-caps.c
index 2c99812..65e92e6 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -717,6 +717,7 @@ static void cap_express_dev(struct device *d, int where, int type)
       printf(" SlotPowerLimit ");
       show_power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26);
     }
+  printf(" TEE-IO%c", FLAG(t, PCI_EXP_DEVCAP_TEE_IO));
   printf("\n");
 
   w = get_conf_word(d, where + PCI_EXP_DEVCTL);
-- 
2.41.0

