From: Bjorn Helgaas <helgaas@kernel.org>
To: Alexey Kardashevskiy <aik@amd.com>
Cc: linux-pci@vger.kernel.org, "Martin Mareš" <mj@ucw.cz>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH pciutils 2/2] pciutils: Add decode support for IDE Extended Capability
Date: Fri, 12 Jan 2024 15:19:59 -0600 [thread overview]
Message-ID: <20240112211959.GA2282480@bhelgaas> (raw)
In-Reply-To: <20231230124239.310927-3-aik@amd.com>
On Sat, Dec 30, 2023 at 11:42:39PM +1100, Alexey Kardashevskiy wrote:
> IDE (Integrity & Data Encryption) Extended Capability defined in [1]
> implements control of the PCI link encryption.
>
> The example output is:
>
> Capabilities: [830 v1] IDE
Possibly expand "IDE"? Many other Capabilities are spelled out:
Capabilities: [c0] Express Downstream Port (Slot+), MSI 00
Capabilities: [100] Device Serial Number 5f-2f-9d-40-30-f1-0c-00
Capabilities: [200] Advanced Error Reporting
Capabilities: [300] Virtual Channel
Capabilities: [400] Power Budgeting <?>
Capabilities: [500] Vendor Specific Information: ID=1234 Rev=1 Len=0d8 <?>
Capabilities: [700] Secondary PCI Express
next prev parent reply other threads:[~2024-01-12 21:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-30 12:42 [PATCH pciutils 0/2] lspci: Adding TDISP, IDE Alexey Kardashevskiy
2023-12-30 12:42 ` [PATCH pciutils 1/2] lspci: Add TEE-IO extended capability bit Alexey Kardashevskiy
2023-12-30 12:42 ` [PATCH pciutils 2/2] pciutils: Add decode support for IDE Extended Capability Alexey Kardashevskiy
2024-01-11 3:52 ` Alexey Kardashevskiy
2024-01-12 21:19 ` Bjorn Helgaas [this message]
2024-01-26 10:15 ` Martin Mareš
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