Re: [Freedreno] [PATCH] drm/msm/dpu: fix clock scaling on non-sc7180 board

From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	David Airlie <airlied@linux.ie>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Daniel Vetter <daniel@ffwll.ch>,
	Kalyan Thota <kalyan_t@codeaurora.org>,
	freedreno@lists.freedesktop.org
Subject: Re: [Freedreno] [PATCH] drm/msm/dpu: fix clock scaling on non-sc7180 board
Date: Tue, 27 Oct 2020 11:49:07 -0700	[thread overview]
Message-ID: <20ac1894035103cc989cbfad3f07d885@codeaurora.org> (raw)
In-Reply-To: <20201027102304.945424-1-dmitry.baryshkov@linaro.org>

On 2020-10-27 03:23, Dmitry Baryshkov wrote:
> c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling for
> display") has added support for handling bandwidth voting in kms path 
> in
> addition to old mdss path. However this broke all other platforms since
> _dpu_core_perf_crtc_update_bus() will now error out instead of properly
> calculating bandwidth and core clocks. Fix
> _dpu_core_perf_crtc_update_bus() to just skip bandwidth setting instead
> of returning an error in case kms->num_paths == 0 (MDSS is used for
> bandwidth management).
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Fixes: c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling
> for display")
> ---
Looks fine to me, thanks for the fix.
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
>  drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index 393858ef8a83..37c8270681c2 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -219,9 +219,6 @@ static int _dpu_core_perf_crtc_update_bus(struct
> dpu_kms *kms,
>  	int i, ret = 0;
>  	u64 avg_bw;
> 
> -	if (!kms->num_paths)
> -		return -EINVAL;
> -
>  	drm_for_each_crtc(tmp_crtc, crtc->dev) {
>  		if (tmp_crtc->enabled &&
>  			curr_client_type ==
> @@ -239,6 +236,9 @@ static int _dpu_core_perf_crtc_update_bus(struct
> dpu_kms *kms,
>  		}
>  	}
> 
> +	if (!kms->num_paths)
> +		return 0;
> +
>  	avg_bw = perf.bw_ctl;
>  	do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/