From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: BALATON Zoltan <balaton@eik.bme.hu>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH v6 03/25] ppc4xx_sdram: Get rid of the init RAM hack
Date: Mon, 26 Sep 2022 13:52:00 -0300 [thread overview]
Message-ID: <22c3993a-ab2a-a313-2a73-658a9ddaa172@gmail.com> (raw)
In-Reply-To: <d6c44c870befa1a075e21f1a59926dcdaff63f6b.1664021647.git.balaton@eik.bme.hu>
On 9/24/22 09:27, BALATON Zoltan wrote:
> The do_init parameter of ppc4xx_sdram_init() is used to map memory
> regions that is normally done by the firmware by programming the SDRAM
> controller. Do this from board code emulating what firmware would do
> when booting a kernel directly from -kernel without a firmware so we
> can get rid of this do_init hack.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> v5: Add function to enable sdram controller
> v2: Fix ref405ep boot with -kernel and U-Boot
>
> hw/ppc/ppc405.h | 1 -
> hw/ppc/ppc405_boards.c | 3 +--
> hw/ppc/ppc405_uc.c | 4 +---
> hw/ppc/ppc440_bamboo.c | 4 +++-
> hw/ppc/ppc4xx_devs.c | 12 +++++++-----
> include/hw/ppc/ppc4xx.h | 5 +++--
> 6 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
> index 1e558c7831..756865621b 100644
> --- a/hw/ppc/ppc405.h
> +++ b/hw/ppc/ppc405.h
> @@ -169,7 +169,6 @@ struct Ppc405SoCState {
> /* Public */
> MemoryRegion ram_banks[2];
> hwaddr ram_bases[2], ram_sizes[2];
> - bool do_dram_init;
>
> MemoryRegion *dram_mr;
> hwaddr ram_size;
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index 083f12b23e..1eaeca8806 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -288,8 +288,6 @@ static void ppc405_init(MachineState *machine)
> machine->ram_size, &error_fatal);
> object_property_set_link(OBJECT(&ppc405->soc), "dram",
> OBJECT(machine->ram), &error_abort);
> - object_property_set_bool(OBJECT(&ppc405->soc), "dram-init",
> - kernel_filename != NULL, &error_abort);
> object_property_set_uint(OBJECT(&ppc405->soc), "sys-clk", 33333333,
> &error_abort);
> qdev_realize(DEVICE(&ppc405->soc), NULL, &error_fatal);
> @@ -349,6 +347,7 @@ static void ppc405_init(MachineState *machine)
>
> /* Load ELF kernel and rootfs.cpio */
> } else if (kernel_filename && !machine->firmware) {
> + ppc4xx_sdram_enable(&ppc405->soc.cpu.env);
> boot_from_kernel(machine, &ppc405->soc.cpu);
> }
> }
> diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
> index 2ca42fdef6..1e02347e57 100644
> --- a/hw/ppc/ppc405_uc.c
> +++ b/hw/ppc/ppc405_uc.c
> @@ -1081,8 +1081,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
> s->ram_bases[0], s->ram_sizes[0]);
>
> ppc4xx_sdram_init(env, qdev_get_gpio_in(DEVICE(&s->uic), 17), 1,
> - s->ram_banks, s->ram_bases, s->ram_sizes,
> - s->do_dram_init);
> + s->ram_banks, s->ram_bases, s->ram_sizes);
>
> /* External bus controller */
> if (!ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(&s->ebc), &s->cpu, errp)) {
> @@ -1160,7 +1159,6 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
> static Property ppc405_soc_properties[] = {
> DEFINE_PROP_LINK("dram", Ppc405SoCState, dram_mr, TYPE_MEMORY_REGION,
> MemoryRegion *),
> - DEFINE_PROP_BOOL("dram-init", Ppc405SoCState, do_dram_init, 0),
> DEFINE_PROP_UINT64("ram-size", Ppc405SoCState, ram_size, 0),
> DEFINE_PROP_END_OF_LIST(),
> };
> diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
> index 5ec82fa8c2..409a8840da 100644
> --- a/hw/ppc/ppc440_bamboo.c
> +++ b/hw/ppc/ppc440_bamboo.c
> @@ -211,7 +211,9 @@ static void bamboo_init(MachineState *machine)
> ppc4xx_sdram_init(env,
> qdev_get_gpio_in(uicdev, 14),
> PPC440EP_SDRAM_NR_BANKS, ram_memories,
> - ram_bases, ram_sizes, 1);
> + ram_bases, ram_sizes);
> + /* Enable SDRAM memory regions, this should be done by the firmware */
> + ppc4xx_sdram_enable(env);
>
> /* PCI */
> dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE,
> diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
> index 1226ec4aa9..3475589679 100644
> --- a/hw/ppc/ppc4xx_devs.c
> +++ b/hw/ppc/ppc4xx_devs.c
> @@ -350,8 +350,7 @@ static void sdram_reset(void *opaque)
> void ppc4xx_sdram_init(CPUPPCState *env, qemu_irq irq, int nbanks,
> MemoryRegion *ram_memories,
> hwaddr *ram_bases,
> - hwaddr *ram_sizes,
> - int do_init)
> + hwaddr *ram_sizes)
> {
> ppc4xx_sdram_t *sdram;
> int i;
> @@ -369,9 +368,12 @@ void ppc4xx_sdram_init(CPUPPCState *env, qemu_irq irq, int nbanks,
> sdram, &dcr_read_sdram, &dcr_write_sdram);
> ppc_dcr_register(env, SDRAM0_CFGDATA,
> sdram, &dcr_read_sdram, &dcr_write_sdram);
> - if (do_init) {
> - sdram_map_bcr(sdram);
> - }
> +}
> +
> +void ppc4xx_sdram_enable(CPUPPCState *env)
> +{
> + ppc_dcr_write(env->dcr_env, SDRAM0_CFGADDR, 0x20);
> + ppc_dcr_write(env->dcr_env, SDRAM0_CFGDATA, 0x80000000);
> }
>
> /*
> diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
> index 2af0d60577..13b3229851 100644
> --- a/include/hw/ppc/ppc4xx.h
> +++ b/include/hw/ppc/ppc4xx.h
> @@ -37,6 +37,8 @@ typedef struct {
> uint32_t bcr;
> } Ppc4xxSdramBank;
>
> +void ppc4xx_sdram_enable(CPUPPCState *env);
> +
> void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
> MemoryRegion ram_memories[],
> hwaddr ram_bases[], hwaddr ram_sizes[],
> @@ -45,8 +47,7 @@ void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
> void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks,
> MemoryRegion ram_memories[],
> hwaddr *ram_bases,
> - hwaddr *ram_sizes,
> - int do_init);
> + hwaddr *ram_sizes);
>
> #define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
>
next prev parent reply other threads:[~2022-09-26 17:16 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-24 12:27 [PATCH v6 00/25] ppc4xx_sdram QOMify and clean ups BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 01/25] ppc440_bamboo: Remove unnecessary memsets BALATON Zoltan
2022-09-26 16:46 ` Daniel Henrique Barboza
2022-09-24 12:27 ` [PATCH v6 02/25] ppc4xx: Introduce Ppc4xxSdramBank struct BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 03/25] ppc4xx_sdram: Get rid of the init RAM hack BALATON Zoltan
2022-09-26 16:52 ` Daniel Henrique Barboza [this message]
2022-09-24 12:27 ` [PATCH v6 04/25] ppc4xx: Use Ppc4xxSdramBank in ppc4xx_sdram_banks() BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 05/25] ppc440_bamboo: Add missing 4 MiB valid memory size BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 06/25] ppc4xx_sdram: Move size check to ppc4xx_sdram_init() BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 07/25] ppc4xx_sdram: QOM'ify BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 08/25] ppc4xx_sdram: Drop extra zeros for readability BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 09/25] ppc440_sdram: Split off map/unmap of sdram banks for later reuse BALATON Zoltan
2022-09-24 12:27 ` [PATCH v6 10/25] ppc440_sdram: Implement enable bit in the DDR2 SDRAM controller BALATON Zoltan
2022-09-26 16:57 ` Daniel Henrique Barboza
2022-09-24 12:28 ` [PATCH v6 11/25] ppc440_sdram: Get rid of the init RAM hack BALATON Zoltan
2022-09-26 16:59 ` Daniel Henrique Barboza
2022-09-24 12:28 ` [PATCH v6 12/25] ppc440_sdram: Rename local variable for readability BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 13/25] ppc4xx_sdram: Rename functions to prevent name clashes BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 14/25] ppc440_sdram: Move RAM size check to ppc440_sdram_init BALATON Zoltan
2022-09-26 16:58 ` Cédric Le Goater
2022-10-14 22:09 ` Daniel Henrique Barboza
2022-10-14 22:52 ` BALATON Zoltan
2022-10-15 10:03 ` Daniel Henrique Barboza
2022-10-15 11:40 ` BALATON Zoltan
2022-10-15 12:03 ` Daniel Henrique Barboza
2022-10-15 13:20 ` BALATON Zoltan
2022-10-15 14:27 ` Daniel Henrique Barboza
2022-09-24 12:28 ` [PATCH v6 15/25] ppc440_sdram: QOM'ify BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 16/25] ppc440_uc.c: Move some macros to ppc4xx.h BALATON Zoltan
2022-09-26 16:57 ` Cédric Le Goater
2022-09-24 12:28 ` [PATCH v6 17/25] ppc440_uc.c: Remove unneeded parenthesis BALATON Zoltan
2022-09-26 16:57 ` Cédric Le Goater
2022-09-24 12:28 ` [PATCH v6 18/25] ppc440_uc.c: Move DDR2 SDRAM controller model to ppc4xx_sdram.c BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 19/25] ppc4xx_devs.c: Move DDR " BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 20/25] ppc4xx_sdram: Move ppc4xx_sdram_banks() " BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 21/25] ppc4xx_sdram: Use hwaddr for memory bank size BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 22/25] ppc4xx_sdram: Rename local state variable for brevity BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 23/25] ppc4xx_sdram: Generalise bank setup BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 24/25] ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling BALATON Zoltan
2022-09-24 12:28 ` [PATCH v6 25/25] ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks() BALATON Zoltan
2022-09-26 17:09 ` [PATCH v6 00/25] ppc4xx_sdram QOMify and clean ups Daniel Henrique Barboza
2022-09-26 17:32 ` Daniel Henrique Barboza
2022-09-26 22:47 ` BALATON Zoltan
2022-10-05 12:02 ` BALATON Zoltan
2022-09-26 17:10 ` Cédric Le Goater
2022-09-26 22:39 ` BALATON Zoltan
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